;****************************************************   
;Copyright (asm) 2024   苏州华芯微电子股份有限公司    
;					       							   
;文件名称:    HS16F1211.inc               			   
;文件标识:					    					   
;摘    要:					    					   
;**************************************************** 
;当前版本:		V1.00		 						   
;作    者:			                    			   
;完成日期:		2024-06-12              			   
;****************************************************   
;【features】
;39-RISC-instruct
;ROM:		2K*14-ROM
;EEPROM:	256*BYTE-EEPROM
;RAM:		128*BYTE-RAM
;TMR0
;TP0
;TC0
;COMPCON	
;stack：	8-levels 
;*****************************************************   
;BANK0~3-定义  
;*****************************************************   
INDF	EQU		000H    
PCL		EQU		002H 
  
STATUS	EQU		003H   
	#define		CARRY         STATUS,0
	#define		ZERO          STATUS,2
	#define		RST           STATUS,7
	
	#define		C	          STATUS,0
	#define		DC            STATUS,1
	#define		Z             STATUS,2
	#define		NPD           STATUS,3	
	#define		NTO           STATUS,4
	#define		RP0           STATUS,5
	#define		RP1           STATUS,6
	#define		IRP           STATUS,7
	
	#define		FC	          STATUS,0
	#define		FDC           STATUS,1
	#define		FZ            STATUS,2	
	#define		FNPD          STATUS,3
	#define		FNTO          STATUS,4
	#define		FRP0          STATUS,5
	#define		FRP1          STATUS,6
	#define		FRST          STATUS,7
	#define		FIRP          STATUS,7	
	
FSR		EQU		004H   
	#define		FSR7          FSR,7
	#define		FFSR7         FSR,7
	
PCHBUF	EQU		0AH   
#define 	PCLATH 	PCHBUF
	#define		PCH0         PCLATH,0
	#define		PCH1         PCLATH,1
	#define		PCH2         PCLATH,2
	
	#define		FPCH0        PCLATH,0
	#define		FPCH1        PCLATH,1
	#define		FPCH2        PCLATH,2
	
INTEN	EQU		0BH    
	#define		T0IE		 INTEN,0   
	#define		PBIE		 INTEN,1   
	#define		INTIE		 INTEN,2   
	#define		TC0IE		 INTEN,3  	   
	#define		TP0IE		 INTEN,4   
	#define		INT1IE		 INTEN,5     
	#define		GIE			 INTEN,7
	                         
	#define		FT0IE		 INTEN,0   
	#define		FPBIE		 INTEN,1   
	#define		FINTIE		 INTEN,2   
	#define		FTC0IE		 INTEN,3 	   
	#define		FTP0IE		 INTEN,4   
	#define		FINT1IE		 INTEN,5     
	#define		FGIE		 INTEN,7   
	   
INTFLAG	EQU		0CH 
	#define		T0IF		 INTFLAG,0   
	#define		PBIF		 INTFLAG,1   
	#define		INTIF		 INTFLAG,2   
	#define		TC0IF		 INTFLAG,3 
	#define		TP0IF		 INTFLAG,4   
	#define		INT1IF		 INTFLAG,5
	                         
	#define		FT0IF		 INTFLAG,0   
	#define		FPBIF		 INTFLAG,1   
	#define		FINTIF		 INTFLAG,2   
	#define		FTC0IF		 INTFLAG,3 
	#define		FTP0IF		 INTFLAG,4   
	#define		FINT1IF		 INTFLAG,5 

;*****************************************************   
;BANK0-定义  
;*****************************************************   
TMR0	EQU		001H  
	
PORTA	EQU		005H   
PA		EQU		005H   
RA		EQU		005H   
	#define		PA0          PORTA,0
	#define		PA1          PORTA,1
	#define		PA2          PORTA,2
	#define		PA3          PORTA,3
	#define		PA4          PORTA,4
	#define		PA5          PORTA,5
	                        
	#define		FPA0         PORTA,0
	#define		FPA1         PORTA,1
	#define		FPA2         PORTA,2
	#define		FPA3         PORTA,3
	#define		FPA4         PORTA,4
	#define		FPA5         PORTA,5
	

PORTB	EQU		006H   
PB		EQU		006H     
RB		EQU		006H 
	#define		PB0          PORTB,0
	#define		PB1          PORTB,1
	#define		PB2          PORTB,2
	#define		PB3          PORTB,3
	#define		PB4          PORTB,4
	#define		PB5          PORTB,5
	#define		PB6          PORTB,6
	#define		PB7          PORTB,7	
	
	#define		FPB0         PORTB,0
	#define		FPB1         PORTB,1
	#define		FPB2         PORTB,2
	#define		FPB3         PORTB,3
	#define		FPB4         PORTB,4
	#define		FPB5         PORTB,5
	#define		FPB6         PORTB,6
	#define		FPB7         PORTB,7	  

;SRAM	EQU		007H   
      
INTFLAG1	EQU		0DH
	;#define	TKINTF		INTFLAG1,0
	#define		COMINTF		INTFLAG1,1
	
	;#define	FTKINTF		INTFLAG1,0
	#define		FCOMINTF	INTFLAG1,1

PDCON	EQU		0EH
	#define		PDA0        PDCON,0
	#define		PDA1        PDCON,1
	#define		PDA2        PDCON,2
	#define		PDA3        PDCON,3
	#define		PDB0        PDCON,4
	#define		PDB1        PDCON,5
	#define		PDB2        PDCON,6
	#define		PDB3        PDCON,7	

	#define		FPDA0       PDCON,0
	#define		FPDA1       PDCON,1
	#define		FPDA2       PDCON,2
	#define		FPDA3       PDCON,3
	#define		FPDB0       PDCON,4
	#define		FPDB1       PDCON,5
	#define		FPDB2       PDCON,6
	#define		FPDB3       PDCON,7	

ODCON	EQU		0FH
	#define		ODB0        ODCON,0
	#define		ODB1        ODCON,1
	#define		ODB2        ODCON,2
	#define		ODB3        ODCON,3
	#define		ODB4        ODCON,4
	#define		ODB5        ODCON,5
	#define		ODB6        ODCON,6
	#define		ODB7        ODCON,7
	
	#define		FODB0       ODCON,0
	#define		FODB1       ODCON,1
	#define		FODB2       ODCON,2
	#define		FODB3       ODCON,3
	#define		FODB4       ODCON,4
	#define		FODB5       ODCON,5
	#define		FODB6       ODCON,6
	#define		FODB7       ODCON,7

;***************************************************** 
PHCON	EQU		010H  
	#define		PHB0        PHCON,0
	#define		PHB1        PHCON,1
	#define		PHB2        PHCON,2
	#define		PHB3        PHCON,3
	#define		PHB4        PHCON,4
	#define		PHB5        PHCON,5
	#define		PHB6        PHCON,6
	#define		PHB7        PHCON,7
	
	#define		FPHB0       PHCON,0
	#define		FPHB1       PHCON,1
	#define		FPHB2       PHCON,2
	#define		FPHB3       PHCON,3
	#define		FPHB4       PHCON,4
	#define		FPHB5       PHCON,5
	#define		FPHB6       PHCON,6
	#define		FPHB7       PHCON,7


    
TC0L	EQU		011H

TC0M	EQU		012H
	#define		PWM0		TC0M,0   
	#define		BUZ			TC0M,1   
	#define		T16SEL		TC0M,2   
	#define		TCCKS		TC0M,3  
	#define		TC0S0		TC0M,4   
	#define		TC0S1		TC0M,5   
	#define		TC0S2		TC0M,6   
	#define		TC0TR		TC0M,7 
	
	#define		FPWM0		TC0M,0   
	#define		FBUZ		TC0M,1   
	#define		FT16SEL		TC0M,2   
	#define		FTCCKS		TC0M,3  
	#define		FTC0S0		TC0M,4   
	#define		FTC0S1		TC0M,5   
	#define		FTC0S2		TC0M,6   
	#define		FTC0TR		TC0M,7 

TC0R	EQU		013H

TC0H	EQU		014H
TC0D1	EQU		015H
TC0D2	EQU		016H

PWMCON	EQU		017H
	#define		PWM1EN      PWMCON,0
	#define		PWM2EN      PWMCON,1
	#define		PWM1S       PWMCON,2
	#define		PWM2S       PWMCON,3
	#define		PWM1XR0     PWMCON,4
	#define		PWM1XR1     PWMCON,5
	#define		PWM2XR0     PWMCON,6
	#define		PWM2XR1     PWMCON,7
	
	#define		FPWM1EN     PWMCON,0
	#define		FPWM2EN     PWMCON,1
	#define		FPWM1S      PWMCON,2
	#define		FPWM2S      PWMCON,3
	#define		FPWM1XR0    PWMCON,4
	#define		FPWM1XR1    PWMCON,5
	#define		FPWM2XR0    PWMCON,6
	#define		FPWM2XR1    PWMCON,7


;*****************************************************  
;BANK1-定义   
;*****************************************************  
OPTION_REG	EQU		081H	
;#define 	OPTION 	OPTION_REG
	#define 	PS0         OPTION_REG,0
	#define 	PS1         OPTION_REG,1
	#define 	PS2         OPTION_REG,2
	#define 	PSA         OPTION_REG,3
	#define 	T0SE        OPTION_REG,4
	#define 	T0CS        OPTION_REG,5
	#define 	INTEDG      OPTION_REG,6
	#define 	INTEDG1     OPTION_REG,7
	
	#define 	FPS0        OPTION_REG,0
	#define 	FPS1        OPTION_REG,1
	#define 	FPS2        OPTION_REG,2
	#define 	FPSA        OPTION_REG,3
	#define 	FT0SE       OPTION_REG,4
	#define 	FT0CS       OPTION_REG,5
	#define 	FINTEDG     OPTION_REG,6
	#define 	FINTEDG1    OPTION_REG,7

TRISA	EQU		085H 
#define 	IOSTA	TRISA
	#define 	TRISA0      TRISA,0
	#define 	TRISA1      TRISA,1
	#define 	TRISA2      TRISA,2
	#define 	TRISA3      TRISA,3
	#define 	TRISA4      TRISA,4
	#define 	TRISA5      TRISA,5
	
	#define 	FTRISA0     TRISA,0
	#define 	FTRISA1     TRISA,1
	#define 	FTRISA2     TRISA,2
	#define 	FTRISA3     TRISA,3
	#define 	FTRISA4     TRISA,4
	#define 	FTRISA5     TRISA,5

TRISB	EQU		086H  
#define 	IOSTB	TRISB
	#define 	TRISB0      TRISB,0
	#define 	TRISB1      TRISB,1
	#define 	TRISB2      TRISB,2
	#define 	TRISB3      TRISB,3
	#define 	TRISB4      TRISB,4
	#define 	TRISB5      TRISB,5
	#define 	TRISB6      TRISB,6
	#define 	TRISB7      TRISB,7
	
	#define 	FTRISB0     TRISB,0
	#define 	FTRISB1     TRISB,1
	#define 	FTRISB2     TRISB,2
	#define 	FTRISB3     TRISB,3
	#define 	FTRISB4     TRISB,4
	#define 	FTRISB5     TRISB,5
	#define 	FTRISB6     TRISB,6
	#define 	FTRISB7     TRISB,7

INTEN1	EQU		08DH
	;#define 	TKINTEN		INTEN1,0
	#define 	COMINTEN	INTEN1,1
	
	;#define 	FTKINTEN	INTEN1,0
	#define 	FCOMINTEN	INTEN1,1
	
PCON	EQU		08EH   
	#define 	LVDTE		PCON,5
	#define 	LVREN		PCON,5
	#define 	EIS			PCON,6
	#define 	WDTE		PCON,7
	
	#define 	FLVDTE		PCON,5
	#define 	FLVREN		PCON,5
	#define 	FEIS		PCON,6
	#define 	FWDTE		PCON,7

WUCON	EQU		08FH  
	#define 	WUB0        WUCON,0
	#define 	WUB1        WUCON,1
	#define 	WUB2        WUCON,2
	#define 	WUB3        WUCON,3
	#define 	WUB4        WUCON,4
	#define 	WUB5        WUCON,5
	#define 	WUB6        WUCON,6
	#define 	WUB7        WUCON,7
	
	#define 	FWUB0       WUCON,0
	#define 	FWUB1       WUCON,1
	#define 	FWUB2       WUCON,2
	#define 	FWUB3       WUCON,3
	#define 	FWUB4       WUCON,4
	#define 	FWUB5       WUCON,5
	#define 	FWUB6       WUCON,6
	#define 	FWUB7       WUCON,7

;***************************************************** 
PAIC0		EQU		090H

PBIC0		EQU		091H

PAHCON		EQU		092H
	#define		PHA0        PAHCON,0
	#define		PHA1        PAHCON,1
	#define		PHA2        PAHCON,2
	#define		PHA3        PAHCON,3
	#define		PHA4        PAHCON,4
	#define		PHA5        PAHCON,5
	
	#define		FPHA0       PAHCON,0
	#define		FPHA1       PAHCON,1
	#define		FPHA2       PAHCON,2
	#define		FPHA3       PAHCON,3
	#define		FPHA4       PAHCON,4
	#define		FPHA5       PAHCON,5

PADCON		EQU		093H
PDCON2		EQU		093H
	#define		PDB4		PDCON2,0
	#define		PDB5		PDCON2,1
	#define		PDB6		PDCON2,2
	#define		PDB7		PDCON2,3
	#define		PDA4		PDCON2,4
	#define		PDA5		PDCON2,5
	
	#define		FPDB4		PDCON2,0
	#define		FPDB5		PDCON2,1
	#define		FPDB6		PDCON2,2
	#define		FPDB7		PDCON2,3
	#define		FPDA4		PDCON2,4
	#define		FPDA5		PDCON2,5
	
OSCM		EQU		094H
	#define		CLKMD		OSCM,0   
	#define		STPHX		OSCM,1   
	;#define	XTSEL		OSCM,2   
	#define		SLCON		OSCM,3 
	#define		SLT0CON		OSCM,4 
	#define		SLT0C		OSCM,4    
	#define		GREENEN		OSCM,5   
	#define		WAKEMODE	OSCM,6   

	#define		FCLKMD		OSCM,0   
	#define		FSTPHX		OSCM,1   
	;#define	FXTSEL		OSCM,2   
	#define		FSLCON		OSCM,3 
	#define		FSLT0CON	OSCM,4  
	#define		FSLT0C		OSCM,4  
	#define		FGREENEN	OSCM,5   
	#define		FWAKEMODE	OSCM,6 


;*****************************************************  
;BANK2-定义   
;*****************************************************
EEADRL		EQU		00DH;010DH
#define		EEADR	EEADRL

EEDATL		EQU		0EH;010EH

;EEADRH		EQU		0FH;010FH;

EECON1		EQU		010H;0110H;
#define		EECON	EECON1
	#define		READEE		EECON1,0
	#define		PROGEE		EECON1,1
	#define		ERASEEE		EECON1,2
	#define		ERSALLEE	EECON1,3
	#define		ERSX16		EECON1,4
	#define		TIMEE0		EECON1,5
	;#define	TIMEE1		EECON1,6
	;#define	TIMEEE		EECON1,6
	
	#define		FREADEE		EECON1,0
	#define		FPROGEE		EECON1,1
	#define		FERASEEE	EECON1,2
	#define		FERSALLEE	EECON1,3
	#define		FERSX16		EECON1,4
	#define		FTIMEE0		EECON1,5
	;#define	FTIMEE1		EECON1,6
	;#define	FTIMEEE		EECON1,6

PWM0EN		EQU		011H;0111H  		
	#define		LOADEN		PWM0EN,0 
	#define		PWM0XEN		PWM0EN,1  
	#define		PWM01XEN	PWM0EN,2   
	#define		PWM0M		PWM0EN,3 
	#define		PWM1XEN		PWM0EN,4  
	#define		TP0SEL8		PWM0EN,5   	   
	#define		TP0EN		PWM0EN,7 
	
	#define		FLOADEN		PWM0EN,0 
	#define		FPWM0XEN	PWM0EN,1  
	#define		FPWM01XEN	PWM0EN,2   
	#define		FPWM0M		PWM0EN,3 
	#define		FPWM1XEN	PWM0EN,4  
	#define		FTP0SEL8	PWM0EN,5   	   
	#define		FTP0EN		PWM0EN,7   

PWM0C		EQU		012H;0112H  
	#define		CK0_0		PWM0C,0 
	#define		CK0_1		PWM0C,1  
	#define		PWMVS0		PWM0C,2  
	#define		PWMVS1		PWM0C,3  
	#define		PWMVS2		PWM0C,4  
	#define		CK0_2		PWM0C,6  	   
	#define		CK0_3		PWM0C,7 
	
	#define		FCK0_0		PWM0C,0 
	#define		FCK0_1		PWM0C,1  
	#define		FPWMVS0		PWM0C,2
	#define		FPWMVS1		PWM0C,3
	#define		FPWMVS2		PWM0C,4
	#define		FCK0_2		PWM0C,6  	   
	#define		FCK0_3		PWM0C,7 
  
PWM0TL		EQU		013H;0113H   
PWM0TH		EQU		014H;0114H   

PWM0PL		EQU		015H;0115H   
PWM0PH		EQU		016H;0116H

PWM0DL		EQU		017H;0117H   
PWM0DH		EQU		018H;0118H  

PWM0DTL		EQU		019H;0119H   
PWM0DTH		EQU		01AH;011AH  
 
PWMPSCON	EQU		01BH;011BH   
	#define		PWM0S0		PWMPSCON,0  
	#define		PWM0S1		PWMPSCON,1  
	#define		PWM01S0		PWMPSCON,2   
	#define		PWM01S1		PWMPSCON,3
	#define		PWM1S0		PWMPSCON,4
	#define		PWM1S1		PWMPSCON,5 
	
	#define		FPWM0S0		PWMPSCON,0  
	#define		FPWM0S1		PWMPSCON,1   
	#define		FPWM01S0	PWMPSCON,2   
	#define		FPWM01S1	PWMPSCON,3
	#define		FPWM1S0		PWMPSCON,4
	#define		FPWM1S1		PWMPSCON,5 

PWM1DL		EQU		01CH;011CH   
PWM1DH		EQU		01DH;011DH

;*****************************************************  
;BANK3-定义   
;*****************************************************
;FLCON1		EQU		08EH;018EH  
;	#define		READL		FLCON1,0   
;	#define		PROGL		FLCON1,1   
;	#define		ERASEL		FLCON1,2   
;	#define		TIMEL0		FLCON1,5   
;	#define		TIMEL1		FLCON1,6   
;	#define		CEFL		FLCON1,7 
;	
;	#define		FREADL		FLCON1,0   
;	#define		FPROGL		FLCON1,1   
;	#define		FERASEL		FLCON1,2   
;	#define		FTIMEL0		FLCON1,5   
;	#define		FTIMEL1		FLCON1,6   
;	#define		FCEFL		FLCON1,7
; 
;FLCON2		EQU		08FH;018FH 
;  
;FLADRH		EQU		090H;0190H   
;FLADRL		EQU		091H;0191H
;   
;FLDATH		EQU		092H;0192H   
;FLDATL		EQU		093H;0193H
;   
;FLerrf		EQU		094H;0194H   
;#define		FLEF	FLerrf
;	#define		FOV		FLerrf,0
;	#define		FFOV	FLerrf,0
;       
;TKC0		EQU		095H;0195H   
;	#define		TKPS0		TKC0,0   
;	#define		TKPS1		TKC0,1   
;	#define		TKPS2		TKC0,2   
;	#define		TKPS3		TKC0,3   
;	#define		CVS			TKC0,4   
;	#define		TKST		TKC0,6	   
;	#define		TKEN		TKC0,7 
;	
;	#define		FTKPS0		TKC0,0   
;	#define		FTKPS1		TKC0,1   
;	#define		FTKPS2		TKC0,2   
;	#define		FTKPS3		TKC0,3   
;	#define		FCVS		TKC0,4   
;	#define		FTKST		TKC0,6	   
;	#define		FTKEN		TKC0,7 
;	
;TK16DH		EQU		096H;0196H   
;TK16DL		EQU		097H;0197H  
; 
;TKC1		EQU		098H;0198H   
;	#define		DCTS0		TKC1,0   
;	#define		DCTS1		TKC1,1   
;	#define		CCFLT0		TKC1,4   
;	#define		CCFLT1		TKC1,5  
;	#define		CCFLT2		TKC1,6 
;	
;	#define		FDCTS0		TKC1,0   
;	#define		FDCTS1		TKC1,1   
;	#define		FCCFLT0		TKC1,4   
;	#define		FCCFLT1		TKC1,5  
;	#define		FCCFLT2		TKC1,6 
;	
;TKC2		EQU		099H;0199H   
;	#define		CTS0		TKC2,0   
;	#define		CTS1		TKC2,1   
;	#define		CTS2		TKC2,2   
;	#define		CTS3		TKC2,3   
;	#define		CTIMS0		TKC2,4  
;	#define		CTIMS1		TKC2,5 
;	
;	#define		FCTS0		TKC2,0   
;	#define		FCTS1		TKC2,1   
;	#define		FCTS2		TKC2,2   
;	#define		FCTS3		TKC2,3   
;	#define		FCTIMS0		TKC2,4  
;	#define		FCTIMS1		TKC2,5 
;	
;TKC3		EQU		09AH;019AH
;	#define		CVREFS0		TKC3,0   
;	#define		CVREFS1		TKC3,1
;	#define		CPVS0		TKC3,3   
;	#define		CPVS1		TKC3,4
;	
;	#define		FCVREFS0	TKC3,0   
;	#define		FCVREFS1	TKC3,1
;	#define		FCPVS0		TKC3,3   
;	#define		FCPVS1		TKC3,4
;   
;TKSTA		EQU		09BH;019BH   
;	#define		SACMPO		TKSTA,1   
;	#define		ACMPO		TKSTA,2   
;	#define		DCMPO		TKSTA,3  
;	#define		TMOUT		TKSTA,7  
;	
;	#define		FSACMPO		TKSTA,1   
;	#define		FACMPO		TKSTA,2   
;	#define		FDCMPO		TKSTA,3  
;	#define		FTMOUT		TKSTA,7   
;	
;TKPDH		EQU		09CH;019CH      
;TKPDL		EQU		09DH;019DH  
 
CMPCON		EQU		09EH;019EH   
#define		CMPC	CMPCON
	#define		COPOL       CMPCON,1
	#define		CVEN        CMPCON,2
	#define		CPEN        CMPCON,3
	#define		CODEB       CMPCON,4
	#define		FTCKS       CMPCON,5
	#define		CMPIF       CMPCON,6
	#define		CMPEN       CMPCON,7
	
	#define		FCOPOL      CMPCON,1
	#define		FCVEN       CMPCON,2
	#define		FCPEN       CMPCON,3
	#define		FCODEB      CMPCON,4
	#define		FFTCKS      CMPCON,5
	#define		FCMPIF      CMPCON,6
	#define		FCMPEN      CMPCON,7
	
CMPM		EQU		09FH;019FH   
	#define		VRS0        CMPM,0
	#define		VRS1        CMPM,1
	#define		VRS2        CMPM,2
	#define		VRS3        CMPM,3
	#define		XRVSEL      CMPM,4
	#define		CPINS0      CMPM,5
	#define		CPINS1      CMPM,6
	#define		XRVSEL1     CMPM,7
	
	#define		FVRS0       CMPM,0
	#define		FVRS1       CMPM,1
	#define		FVRS2       CMPM,2
	#define		FVRS3       CMPM,3
	#define		FXRVSEL     CMPM,4
	#define		FCPINS0     CMPM,5
	#define		FCPINS1     CMPM,6
    #define		FXRVSEL1    CMPM,7
     
;*****************************************************   
;PIN-DEFINE   
;****************************************************   
;	    PA0	-1		14- PA1	                   *   
;	    PB7	-2		13- PA2	                   *   
;	    PB6	-3		12- PA3	                   *   
;	    VDD -4		11- VSS	                   *   
;	    PB5	-5		10- PB0	                   *   
;	    PB4	-6		9 - PB1	                   *   
;	    PB3	-7		8 - PB2	                   *   
;****************************************************      

	
