#ifndef __SN8P27122__H
#define __SN8P27122__H

void _ClearWatchDogTimer(void);
void _ClrRAM(void);

#define NOP(X)  	__asm{	_NOP X }
#define LOG(X)  	__asm{	LOG CNameToAsmLabel(X) }
sfr	L = 0x80;
sfr	H = 0x81;
sfr	R = 0x82;
sfr	Z = 0x83;
sfr	Y = 0x84;
sfr	PFLAG = 0x86;
sbit	FZ = 0x86:0;
sbit	FDC = 0x86:1;
sbit	FC = 0x86:2;
sbit	FLVD24 = 0x86:4;
sbit	FLVD36 = 0x86:5;
sbit	FNPD = 0x86:6;
sbit	FNT0 = 0x86:7;
sfr	TC2M = 0xA0;
sbit	FTC2ENB = 0xA0:7;
sbit	FTC2RATE2 = 0xA0:6;
sbit	FTC2RATE1 = 0xA0:5;
sbit	FTC2RATE0 = 0xA0:4;
sbit	FTC2CKS = 0xA0:3;
sbit	FALOAD2 = 0xA0:2;
sbit	FTC2OUT = 0xA0:1;
sbit	FPWM2OUT = 0xA0:0;
sfr	TC2C = 0xA1;
sfr	TC2R = 0xA2;
sfr	TC3M = 0xA3;
sbit	FTC3ENB = 0xA3:7;
sbit	FTC3RATE2 = 0xA3:6;
sbit	FTC3RATE1 = 0xA3:5;
sbit	FTC3RATE0 = 0xA3:4;
sbit	FTC3CKS = 0xA3:3;
sbit	FALOAD3 = 0xA3:2;
sbit	FTC3OUT = 0xA3:1;
sbit	FPWM3OUT = 0xA3:0;
sfr	TC3C = 0xA4;
sfr	TC3R = 0xA5;
sfr	P4CON = 0xAE;
sfr	P0CON = 0xAF;
sfr	VREFH = 0xB0;
sbit	FVHS0 = 0xB0:0;
sbit	FVHS1 = 0xB0:1;
sbit	FEVHENB = 0xB0:7;
sfr	ADM = 0xB1;
sbit	FCHS0 = 0xB1:0;
sbit	FCHS1 = 0xB1:1;
sbit	FCHS2 = 0xB1:2;
sbit	FCHS3 = 0xB1:3;
sbit	FGCHS = 0xB1:4;
sbit	FEOC = 0xB1:5;
sbit	FADS = 0xB1:6;
sbit	FADENB = 0xB1:7;
sfr	ADB = 0xB2;
sfr	ADR = 0xB3;
sbit	FADB0 = 0xB3:0;
sbit	FADB1 = 0xB3:1;
sbit	FADB2 = 0xB3:2;
sbit	FADB3 = 0xB3:3;
sbit	FADCKS0 = 0xB3:4;
sbit	FADLEN = 0xB3:5;
sbit	FADCKS1 = 0xB3:6;
sfr	ADT = 0xB4;
sbit	FADT0 = 0xB4:0;
sbit	FADT1 = 0xB4:1;
sbit	FADT2 = 0xB4:2;
sbit	FADT3 = 0xB4:3;
sbit	FADT4 = 0xB4:4;
sbit	FADTS0 = 0xB4:6;
sbit	FADTS1 = 0xB4:7;
sfr	P0M = 0xB8;
sbit	FP00M = 0xB8:0;
sbit	FP02M = 0xB8:2;
sbit	FP03M = 0xB8:3;
sbit	FP04M = 0xB8:4;
sbit	FP05M = 0xB8:5;
sbit	FP06M = 0xB8:6;
sbit	FP07M = 0xB8:7;
sfr	PEDGE = 0xBF;
sbit	FP00G0 = 0xBF:3;
sbit	FP00G1 = 0xBF:4;
sfr	P4M = 0xC4;
sbit	FP47M = 0xC4:7;
sbit	FP46M = 0xC4:6;
sbit	FP45M = 0xC4:5;
sbit	FP44M = 0xC4:4;
sbit	FP43M = 0xC4:3;
sbit	FP42M = 0xC4:2;
sbit	FP41M = 0xC4:1;
sbit	FP40M = 0xC4:0;
sfr	INTRQ = 0xC8;
sbit	FADCIRQ = 0xC8:7;
sbit	FTC0IRQ = 0xC8:5;
sbit	FT0IRQ = 0xC8:4;
sbit	FP00IRQ = 0xC8:0;
sfr	INTEN = 0xC9;
sbit	FADCIEN = 0xC9:7;
sbit	FTC0IEN = 0xC9:5;
sbit	FT0IEN = 0xC9:4;
sbit	FP00IEN = 0xC9:0;
sfr	OSCM = 0xCA;
sbit	FCPUM1 = 0xCA:4;
sbit	FCPUM0 = 0xCA:3;
sbit	FCLKMD = 0xCA:2;
sbit	FSTPHX = 0xCA:1;
sfr	WDTR = 0xCC;
sfr	TC0R = 0xCD;
sfr	PCL = 0xCE;
sfr	PCH = 0xCF;
sfr	P0 = 0xD0;
sbit	FP00 = 0xD0:0;
sbit	FP01 = 0xD0:1;
sbit	FP02 = 0xD0:2;
sbit	FP03 = 0xD0:3;
sbit	FP04 = 0xD0:4;
sbit	FP05 = 0xD0:5;
sbit	FP06 = 0xD0:6;
sbit	FP07 = 0xD0:7;
sfr	P4 = 0xD4;
sbit	FP47 = 0xD4:7;
sbit	FP46 = 0xD4:6;
sbit	FP45 = 0xD4:5;
sbit	FP44 = 0xD4:4;
sbit	FP43 = 0xD4:3;
sbit	FP42 = 0xD4:2;
sbit	FP41 = 0xD4:1;
sbit	FP40 = 0xD4:0;
sfr	T0M = 0xD8;
sbit	FT0ENB = 0xD8:7;
sbit	FT0RATE2 = 0xD8:6;
sbit	FT0RATE1 = 0xD8:5;
sbit	FT0RATE0 = 0xD8:4;
sbit	FTC0CKS1 = 0xD8:1;
sbit	FT0TB = 0xD8:0;
sfr	T0C = 0xD9;
sfr	TC0M = 0xDA;
sbit	FTC0ENB = 0xDA:7;
sbit	FTC0RATE2 = 0xDA:6;
sbit	FTC0RATE1 = 0xDA:5;
sbit	FTC0RATE0 = 0xDA:4;
sbit	FTC0CKS = 0xDA:3;
sbit	FALOAD0 = 0xDA:2;
sbit	FTC0OUT = 0xDA:1;
sbit	FPWM0OUT = 0xDA:0;
sfr	TC0C = 0xDB;
sfr	TC1M = 0xDC;
sbit	FTC1ENB = 0xDC:7;
sbit	FTC1RATE2 = 0xDC:6;
sbit	FTC1RATE1 = 0xDC:5;
sbit	FTC1RATE0 = 0xDC:4;
sbit	FTC1CKS = 0xDC:3;
sbit	FALOAD1 = 0xDC:2;
sbit	FTC1OUT = 0xDC:1;
sbit	FPWM1OUT = 0xDC:0;
sfr	TC1C = 0xDD;
sfr	TC1R = 0xDE;
sfr	STKP = 0xDF;
sbit	FGIE = 0xDF:7;
sbit	FSTKPB2 = 0xDF:2;
sbit	FSTKPB1 = 0xDF:1;
sbit	FSTKPB0 = 0xDF:0;
sfr	P0UR = 0xE0;
sbit	FP00R = 0xE0:0;
sbit	FP02R = 0xE0:2;
sbit	FP03R = 0xE0:3;
sbit	FP04R = 0xE0:4;
sbit	FP05R = 0xE0:5;
sbit	FP06R = 0xE0:6;
sbit	FP07R = 0xE0:7;
sfr	P4UR = 0xE4;
sbit	FP47R = 0xE4:7;
sbit	FP46R = 0xE4:6;
sbit	FP45R = 0xE4:5;
sbit	FP44R = 0xE4:4;
sbit	FP43R = 0xE4:3;
sbit	FP42R = 0xE4:2;
sbit	FP41R = 0xE4:1;
sbit	FP40R = 0xE4:0;
sfr	_HL = 0xE6;
sfr	_YZ = 0xE7;
sfr	STK7L = 0xF0;
sfr	STK7H = 0xF1;
sfr	STK6L = 0xF2;
sfr	STK6H = 0xF3;
sfr	STK5L = 0xF4;
sfr	STK5H = 0xF5;
sfr	STK4L = 0xF6;
sfr	STK4H = 0xF7;
sfr	STK3L = 0xF8;
sfr	STK3H = 0xF9;
sfr	STK2L = 0xFA;
sfr	STK2H = 0xFB;
sfr	STK1L = 0xFC;
sfr	STK1H = 0xFD;
sfr	STK0L = 0xFE;
sfr	STK0H = 0xFF;
#define SLEEPMODE __asm{SleepMode}
#define GREENMODE __asm{GreenMode}
#define SLOWMODE __asm{SlowMode}
#define SLOW2NORMAL __asm{Slow2Normal}
#endif
