#ifndef __SN8DW100__H
#define __SN8DW100__H

void _ClearWatchDogTimer(void);
void _ClrRAM(void);

#define NOP(X)  	__asm{	_NOP X }
#define LOG(X)  	__asm{	LOG CNameToAsmLabel(X) }
sfr	L = 0x80;
sfr	H = 0x81;
sfr	R = 0x82;
sfr	Z = 0x83;
sfr	Y = 0x84;
sfr	X = 0x85;
sfr	PFLAG = 0x86;
sbit	FZ = 0x86:0;
sbit	FDC = 0x86:1;
sbit	FC = 0x86:2;
sfr	RBANK = 0x87;
sbit	FRBNKS0 = 0x87:0;
sbit	FRBNKS1 = 0x87:1;
sbit	FRBNKS2 = 0x87:2;
sfr	W0 = 0x88;
sfr	W1 = 0x89;
sfr	W2 = 0x8a;
sfr	W3 = 0x8b;
sfr	W4 = 0x8c;
sfr	W5 = 0x8d;
sfr	W6 = 0x8e;
sfr	W7 = 0x8f;
sfr	VREG = 0x90;
sbit	FAVDDREN = 0x90:0;
sbit	FAVEN = 0x90:1;
sbit	FACMEN = 0x90:2;
sbit	FBGEN = 0x90:3;
sbit	PGAEH0 = 0x90:4;
sbit	PGAEH1 = 0x90:5;
sfr	ADCM1 = 0x92;
sbit	FRVS0 = 0x92:0;
sbit	FRVS1 = 0x92:1;
sbit	FRVS2 = 0x92:2;
sbit	FRVS3 = 0x92:3;
sbit	FOSR0 = 0x92:4;
sbit	FOSR1 = 0x92:5;
sbit	FOSR2 = 0x92:6;
sbit	FOSR3 = 0x92:7;
sfr	ADCM2 = 0x93;
sbit	FADEN = 0x93:0;
sbit	FDRDY = 0x93:1;
sbit	FADGN = 0x93:2;
sbit	FGR = 0x93:3;
sbit	FGX = 0x93:4;
sbit	FINREN = 0x93:5;
sbit	FCIC = 0x93:6;
sfr	ADCM3 = 0x94;
sbit	FADCKS0 = 0x94:0;
sbit	FADCKS1 = 0x94:1;
sbit	FADCKS2 = 0x94:2;
sbit	FCPCSK0 = 0x94:4;
sbit	FCPCSK1 = 0x94:5;
sbit	FCPCSK2 = 0x94:6;
sbit	FACHPEN = 0x94:7;
sfr	LBTM = 0x95;
sbit	FLBTEN = 0x95:0;
sbit	FLBTO = 0x95:1;
sbit	FLBTSEL0 = 0x95:2;
sbit	FLBTSEL1 = 0x95:3;
sbit	FLBTSEL2 = 0x95:4;
sbit	FLBTSEL3 = 0x95:5;
sbit	FP01IO = 0x95:6;
sfr	CHS1 = 0x96;
sbit	MUX10 = 0x96:0;
sbit	MUX11 = 0x96:1;
sbit	MUX12 = 0x96:2;
sbit	MUX13 = 0x96:3;
sbit	MUX20 = 0x96:4;
sbit	MUX21 = 0x96:5;
sbit	MUX30 = 0x96:6;
sfr	CHS2 = 0x97;
sbit	MUX40 = 0x97:0;
sbit	MUX41 = 0x97:1;
sbit	MUX42 = 0x97:2;
sbit	MUX43 = 0x97:3;
sbit	MUX44 = 0x97:4;
sbit	MUXA0 = 0x97:6;
sbit	MUXA1 = 0x97:7;
sfr	ADCDH = 0x9c;
sfr	ADCDM = 0x9d;
sfr	ADCDL = 0x9e;
sfr	AMPM = 0x9f;
sbit	FAMPEN = 0x9f:0;
sbit	FPCHPEN = 0x9f:1;
sbit	FGS0 = 0x9f:2;
sbit	FGS1 = 0x9f:3;
sbit	FGS2 = 0x9f:4;
sbit	FSW100K = 0x9f:5;
sbit	FAVDDRS0 = 0x9f:6;
sbit	FAVDDRS1 = 0x9f:7;
sfr	P0M = 0xa0;
sbit	FP00M = 0xa0:0;
sbit	FP01M = 0xa0:1;
sbit	FP02M = 0xa0:2;
sbit	FP03M = 0xa0:3;
sfr	P0UR = 0xa4;
sbit	FP00R = 0xa4:0;
sbit	FP01R = 0xa4:1;
sbit	FP02R = 0xa4:2;
sbit	FP03R = 0xa4:3;
sfr	P0 = 0xa8;
sbit	FP00 = 0xa8:0;
sbit	FP01 = 0xa8:1;
sbit	FP02 = 0xa8:2;
sbit	FP03 = 0xa8:3;
sfr	INTEN = 0xb0;
sbit	FP00IEN = 0xb0:0;
sbit	FSIOIEN = 0xb0:4;
sbit	FMSPIEN = 0xb0:5;
sbit	FT0IEN = 0xb0:6;
sbit	FADCIEN = 0xb0:7;
sfr	INTRQ = 0xb2;
sbit	FP00IRQ = 0xb2:0;
sbit	FSIOIRQ = 0xb2:4;
sbit	FMSPIRQ = 0xb2:5;
sbit	FT0IRQ = 0xb2:6;
sbit	FADCIRQ = 0xb2:7;
sfr	OSCM = 0xb6;
sbit	FSTPHX = 0xb6:1;
sbit	FCLKMD = 0xb6:2;
sbit	FCPUM0 = 0xb6:3;
sbit	FCPUM1 = 0xb6:4;
sfr	WDTR = 0xb7;
sfr	PCH = 0xb8;
sfr	PCL = 0xb9;
sfr	STKP = 0xba;
sbit	FSTKPB0 = 0xba:0;
sbit	FSTKPB1 = 0xba:1;
sbit	FSTKPB2 = 0xba:2;
sbit	FSTKPB3 = 0xba:3;
sbit	FGIE = 0xba:7;
sfr	PEDGE = 0xbb;
sbit	FP00G0 = 0xbb:0;
sbit	FP00G1 = 0xbb:1;
sfr	_HL = 0xbc;
sfr	_YZ = 0xbd;
sfr	T0M = 0xc0;
sbit	FT0RATE0 = 0xc0:4;
sbit	FT0RATE1 = 0xc0:5;
sbit	FT0RATE2 = 0xc0:6;
sbit	FT0ENB = 0xc0:7;
sfr	T0C = 0xc1;
sfr	MSPSTAT = 0xd0;
sbit	FBF = 0xd0:0;
sbit	FRED_WRT = 0xd0:2;
sbit	FS = 0xd0:3;
sbit	FP = 0xd0:4;
sbit	FD_A = 0xd0:5;
sbit	FCKE = 0xd0:6;
sfr	MSPM1 = 0xd1;
sbit	FMSPC = 0xd1:0;
sbit	FMSPWK = 0xd1:2;
sbit	FSLRXCKP = 0xd1:3;
sbit	FCKP = 0xd1:4;
sbit	FMSPENB = 0xd1:5;
sbit	FMSPOV = 0xd1:6;
sbit	FWCOL = 0xd1:7;
sfr	MSPM2 = 0xd2;
sbit	FSEN = 0xd2:0;
sbit	FRSEN = 0xd2:1;
sbit	FPEN = 0xd2:2;
sbit	FRCEN = 0xd2:3;
sbit	FACKEN = 0xd2:4;
sbit	FACKDT = 0xd2:5;
sbit	FACKSTAT = 0xd2:6;
sbit	FGCEN = 0xd2:7;
sfr	MSPBUF = 0xd3;
sfr	MSPADR = 0xd4;
sfr	SIOM = 0xd5;
sbit	FSENB = 0xd5:7;
sbit	FSTART = 0xd5:6;
sbit	FSRATE1 = 0xd5:5;
sbit	FSRATE0 = 0xd5:4;
sbit	FMLSB = 0xd5:3;
sbit	FSCKMD = 0xd5:2;
sbit	FCPOL = 0xd5:1;
sbit	FCPHA = 0xd5:0;
sfr	SIOR = 0xd6;
sfr	SIOB = 0xd7;
sfr	PECMD = 0xda;
sfr	PEROML = 0xdb;
sfr	PEROMH = 0xdc;
sbit	PEROMH0 = 0xdc:0;
sbit	PEROMH1 = 0xdc:1;
sbit	PEROMH2 = 0xdc:2;
sbit	PEROMH3 = 0xdc:3;
sbit	PEROMH4 = 0xdc:4;
sfr	PERAML = 0xdd;
sfr	PERAMH = 0xde;
sbit	PERAMH0 = 0xde:0;
sbit	PERAMH1 = 0xde:1;
sbit	PERAMH2 = 0xde:2;
sfr	PERAMCNT = 0xdf;
sbit	PERAMCNT0 = 0xdf:3;
sbit	PERAMCNT1 = 0xdf:4;
sbit	PERAMCNT2 = 0xdf:5;
sbit	PERAMCNT3 = 0xdf:6;
sbit	PERAMCNT4 = 0xdf:7;
sfr	STK0L = 0xe0;
sfr	STK0H = 0xe1;
sfr	STK1L = 0xe2;
sfr	STK1H = 0xe3;
sfr	STK2L = 0xe4;
sfr	STK2H = 0xe5;
sfr	STK3L = 0xe6;
sfr	STK3H = 0xe7;
sfr	STK4L = 0xe8;
sfr	STK4H = 0xe9;
sfr	STK5L = 0xea;
sfr	STK5H = 0xeb;
sfr	STK6L = 0xec;
sfr	STK6H = 0xed;
sfr	STK7L = 0xee;
sfr	STK7H = 0xef;
sfr	STK8L = 0xf0;
sfr	STK8H = 0xf1;
sfr	STK9L = 0xf2;
sfr	STK9H = 0xf3;
sfr	STK10L = 0xf4;
sfr	STK10H = 0xf5;
sfr	STK11L = 0xf6;
sfr	STK11H = 0xf7;
sfr	STK12L = 0xf8;
sfr	STK12H = 0xf9;
sfr	STK13L = 0xfa;
sfr	STK13H = 0xfb;
sfr	STK14L = 0xfc;
sfr	STK14H = 0xfd;
sfr	STK15L = 0xfe;
sfr	STK15H = 0xff;
#define SLEEPMODE __asm{SleepMode}
#define GREENMODE __asm{GreenMode}
#define SLOWMODE __asm{SlowMode}
#define SLOW2NORMAL __asm{Slow2Normal}
#endif
