#ifndef __SN8F22711B__H
#define __SN8F22711B__H
struct specialRegister{
	unsigned bit0:1;
	unsigned bit1:1;
	unsigned bit2:1;
	unsigned bit3:1;
	unsigned bit4:1;
	unsigned bit5:1;
	unsigned bit6:1;
	unsigned bit7:1;
};


void _ClearWatchDogTimer(void);
void _ClrRAM(void);

#define NOP(X)  	__asm{	_NOP X }
#define LOG(X)  	__asm{	LOG CNameToAsmLabel(X) }
#define	R	(*((__RAM unsigned int*)0x82))
#define	Z	(*((__RAM unsigned int*)0x83))
#define	Y	(*((__RAM unsigned int*)0x84))
#define	PFLAG	(*((__RAM unsigned int*)0x86))
#define	FZ	((*((__RAM struct specialRegister *)0x86)).bit0)
#define	FDC	((*((__RAM struct specialRegister *)0x86)).bit1)
#define	FC	((*((__RAM struct specialRegister *)0x86)).bit2)
#define	FNPD	((*((__RAM struct specialRegister *)0x86)).bit6)
#define	FNT0	((*((__RAM struct specialRegister *)0x86)).bit7)
#define	RBANK	(*((__RAM unsigned int*)0x87))
#define	FRBNKS0	((*((__RAM struct specialRegister *)0x87)).bit0)
#define	FRBNKS1	((*((__RAM struct specialRegister *)0x87)).bit1)
#define	TC0M	(*((__RAM unsigned int*)0x88))
#define	FTC0ENB	((*((__RAM struct specialRegister *)0x88)).bit7)
#define	FTC0RATE2	((*((__RAM struct specialRegister *)0x88)).bit6)
#define	FTC0RATE1	((*((__RAM struct specialRegister *)0x88)).bit5)
#define	FTC0RATE0	((*((__RAM struct specialRegister *)0x88)).bit4)
#define	FTC0CKS	((*((__RAM struct specialRegister *)0x88)).bit3)
#define	FALOAD0	((*((__RAM struct specialRegister *)0x88)).bit2)
#define	FTC0OUT	((*((__RAM struct specialRegister *)0x88)).bit1)
#define	FPWM0OUT	((*((__RAM struct specialRegister *)0x88)).bit0)
#define	TC0C	(*((__RAM unsigned int*)0x89))
#define	TC0R	(*((__RAM unsigned int*)0x8a))
#define	CFS	(*((__RAM unsigned int*)0x8e))
#define	FIHRCOEN	((*((__RAM struct specialRegister *)0x8e)).bit7)
#define	FCFS2	((*((__RAM struct specialRegister *)0x8e)).bit2)
#define	FCFS1	((*((__RAM struct specialRegister *)0x8e)).bit1)
#define	FCFS0	((*((__RAM struct specialRegister *)0x8e)).bit0)
#define	S_STAT	(*((__RAM unsigned int*)0x8f))
#define	FS_STAT5	((*((__RAM struct specialRegister *)0x8f)).bit5)
#define	FS_STAT4	((*((__RAM struct specialRegister *)0x8f)).bit4)
#define	FS_STAT3	((*((__RAM struct specialRegister *)0x8f)).bit3)
#define	FS_STAT2	((*((__RAM struct specialRegister *)0x8f)).bit2)
#define	FS_STAT1	((*((__RAM struct specialRegister *)0x8f)).bit1)
#define	FS_STAT0	((*((__RAM struct specialRegister *)0x8f)).bit0)
#define	UDA	(*((__RAM unsigned int*)0x90))
#define	FUDE	((*((__RAM struct specialRegister *)0x90)).bit7)
#define	FUDA6	((*((__RAM struct specialRegister *)0x90)).bit6)
#define	FUDA5	((*((__RAM struct specialRegister *)0x90)).bit5)
#define	FUDA4	((*((__RAM struct specialRegister *)0x90)).bit4)
#define	FUDA3	((*((__RAM struct specialRegister *)0x90)).bit3)
#define	FUDA2	((*((__RAM struct specialRegister *)0x90)).bit2)
#define	FUDA1	((*((__RAM struct specialRegister *)0x90)).bit1)
#define	FUDA0	((*((__RAM struct specialRegister *)0x90)).bit0)
#define	USTATUS	(*((__RAM unsigned int*)0x91))
#define	FBUS_RST	((*((__RAM struct specialRegister *)0x91)).bit4)
#define	FSUSPEND	((*((__RAM struct specialRegister *)0x91)).bit3)
#define	FEP0SETUP	((*((__RAM struct specialRegister *)0x91)).bit2)
#define	FEP0IN	((*((__RAM struct specialRegister *)0x91)).bit1)
#define	FEP0OUT	((*((__RAM struct specialRegister *)0x91)).bit0)
#define	EP0OUT_CNT	(*((__RAM unsigned int*)0x92))
#define	FUEP0OC4	((*((__RAM struct specialRegister *)0x92)).bit4)
#define	FUEP0OC3	((*((__RAM struct specialRegister *)0x92)).bit3)
#define	FUEP0OC2	((*((__RAM struct specialRegister *)0x92)).bit2)
#define	FUEP0OC1	((*((__RAM struct specialRegister *)0x92)).bit1)
#define	FUEP0OC0	((*((__RAM struct specialRegister *)0x92)).bit0)
#define	USB_INT_EN	(*((__RAM unsigned int*)0x93))
#define	REG_EN	((*((__RAM struct specialRegister *)0x93)).bit7)
#define	FDP_PU_EN	((*((__RAM struct specialRegister *)0x93)).bit6)
#define	FEP2NAK_INT_EN	((*((__RAM struct specialRegister *)0x93)).bit1)
#define	FEP1NAK_INT_EN	((*((__RAM struct specialRegister *)0x93)).bit0)
#define	EP_ACK	(*((__RAM unsigned int*)0x94))
#define	FEP2_ACK	((*((__RAM struct specialRegister *)0x94)).bit1)
#define	FEP1_ACK	((*((__RAM struct specialRegister *)0x94)).bit0)
#define	EP_NAK	(*((__RAM unsigned int*)0x95))
#define	FEP2_NAK	((*((__RAM struct specialRegister *)0x95)).bit1)
#define	FEP1_NAK	((*((__RAM struct specialRegister *)0x95)).bit0)
#define	UE0R	(*((__RAM unsigned int*)0x96))
#define	FUE0M1	((*((__RAM struct specialRegister *)0x96)).bit6)
#define	FUE0M0	((*((__RAM struct specialRegister *)0x96)).bit5)
#define	FUE0C3	((*((__RAM struct specialRegister *)0x96)).bit3)
#define	FUE0C2	((*((__RAM struct specialRegister *)0x96)).bit2)
#define	FUE0C1	((*((__RAM struct specialRegister *)0x96)).bit1)
#define	FUE0C0	((*((__RAM struct specialRegister *)0x96)).bit0)
#define	UE1R	(*((__RAM unsigned int*)0x97))
#define	FUE1E	((*((__RAM struct specialRegister *)0x97)).bit7)
#define	FUE1M1	((*((__RAM struct specialRegister *)0x97)).bit6)
#define	FUE1M0	((*((__RAM struct specialRegister *)0x97)).bit5)
#define	FUE1D	((*((__RAM struct specialRegister *)0x97)).bit4)
#define	FUE1C3	((*((__RAM struct specialRegister *)0x97)).bit3)
#define	FUE1C2	((*((__RAM struct specialRegister *)0x97)).bit2)
#define	FUE1C1	((*((__RAM struct specialRegister *)0x97)).bit1)
#define	FUE1C0	((*((__RAM struct specialRegister *)0x97)).bit0)
#define	UE2R	(*((__RAM unsigned int*)0x98))
#define	FUE2E	((*((__RAM struct specialRegister *)0x98)).bit7)
#define	FUE2M1	((*((__RAM struct specialRegister *)0x98)).bit6)
#define	FUE2M0	((*((__RAM struct specialRegister *)0x98)).bit5)
#define	FUE2D	((*((__RAM struct specialRegister *)0x98)).bit4)
#define	FUE2C3	((*((__RAM struct specialRegister *)0x98)).bit3)
#define	FUE2C2	((*((__RAM struct specialRegister *)0x98)).bit2)
#define	FUE2C1	((*((__RAM struct specialRegister *)0x98)).bit1)
#define	FUE2C0	((*((__RAM struct specialRegister *)0x98)).bit0)
#define	UDP0	(*((__RAM unsigned int*)0xa3))
#define	FUDP07	((*((__RAM struct specialRegister *)0xa3)).bit7)
#define	FUDP06	((*((__RAM struct specialRegister *)0xa3)).bit6)
#define	FUDP05	((*((__RAM struct specialRegister *)0xa3)).bit5)
#define	FUDP04	((*((__RAM struct specialRegister *)0xa3)).bit4)
#define	FUDP03	((*((__RAM struct specialRegister *)0xa3)).bit3)
#define	FUDP02	((*((__RAM struct specialRegister *)0xa3)).bit2)
#define	FUDP01	((*((__RAM struct specialRegister *)0xa3)).bit1)
#define	FUDP00	((*((__RAM struct specialRegister *)0xa3)).bit0)
#define	UDP0_H	(*((__RAM unsigned int*)0xa4))
#define	FWE0	((*((__RAM struct specialRegister *)0xa4)).bit7)
#define	FRE0	((*((__RAM struct specialRegister *)0xa4)).bit6)
#define	UDR0_R	(*((__RAM unsigned int*)0xa5))
#define	FUDR0_R7	((*((__RAM struct specialRegister *)0xa5)).bit7)
#define	FUDR0_R6	((*((__RAM struct specialRegister *)0xa5)).bit6)
#define	FUDR0_R5	((*((__RAM struct specialRegister *)0xa5)).bit5)
#define	FUDR0_R4	((*((__RAM struct specialRegister *)0xa5)).bit4)
#define	FUDR0_R3	((*((__RAM struct specialRegister *)0xa5)).bit3)
#define	FUDR0_R2	((*((__RAM struct specialRegister *)0xa5)).bit2)
#define	FUDR0_R1	((*((__RAM struct specialRegister *)0xa5)).bit1)
#define	FUDR0_R0	((*((__RAM struct specialRegister *)0xa5)).bit0)
#define	UDR0_W	(*((__RAM unsigned int*)0xa6))
#define	FUDR0_W7	((*((__RAM struct specialRegister *)0xa6)).bit7)
#define	FUDR0_W6	((*((__RAM struct specialRegister *)0xa6)).bit6)
#define	FUDR0_W5	((*((__RAM struct specialRegister *)0xa6)).bit5)
#define	FUDR0_W4	((*((__RAM struct specialRegister *)0xa6)).bit4)
#define	FUDR0_W3	((*((__RAM struct specialRegister *)0xa6)).bit3)
#define	FUDR0_W2	((*((__RAM struct specialRegister *)0xa6)).bit2)
#define	FUDR0_W1	((*((__RAM struct specialRegister *)0xa6)).bit1)
#define	FUDR0_W0	((*((__RAM struct specialRegister *)0xa6)).bit0)
#define	EP1OUT_CNT	(*((__RAM unsigned int*)0xa7))
#define	FUEP1OC4	((*((__RAM struct specialRegister *)0xa7)).bit4)
#define	FUEP1OC3	((*((__RAM struct specialRegister *)0xa7)).bit3)
#define	FUEP1OC2	((*((__RAM struct specialRegister *)0xa7)).bit2)
#define	FUEP1OC1	((*((__RAM struct specialRegister *)0xa7)).bit1)
#define	FUEP1OC0	((*((__RAM struct specialRegister *)0xa7)).bit0)
#define	EP2OUT_CNT	(*((__RAM unsigned int*)0xa8))
#define	FUEP2OC4	((*((__RAM struct specialRegister *)0xa8)).bit4)
#define	FUEP2OC3	((*((__RAM struct specialRegister *)0xa8)).bit3)
#define	FUEP2OC2	((*((__RAM struct specialRegister *)0xa8)).bit2)
#define	FUEP2OC1	((*((__RAM struct specialRegister *)0xa8)).bit1)
#define	FUEP2OC0	((*((__RAM struct specialRegister *)0xa8)).bit0)
#define	UPID	(*((__RAM unsigned int*)0xab))
#define	FEP0OUT_EN	((*((__RAM struct specialRegister *)0xab)).bit7)
#define	FLENGTH4_TOGGLE	((*((__RAM struct specialRegister *)0xab)).bit5)
#define	FUE0E	((*((__RAM struct specialRegister *)0xab)).bit4)
#define	FUBDE	((*((__RAM struct specialRegister *)0xab)).bit2)
#define	FDDP	((*((__RAM struct specialRegister *)0xab)).bit1)
#define	FDDN	((*((__RAM struct specialRegister *)0xab)).bit0)
#define	UTOGGLE	(*((__RAM unsigned int*)0xac))
#define	FEP2_DATA01	((*((__RAM struct specialRegister *)0xac)).bit1)
#define	FEP1_DATA01	((*((__RAM struct specialRegister *)0xac)).bit0)
#define	IHRCU	(*((__RAM unsigned int*)0xb0))
#define	FIHRCU5	((*((__RAM struct specialRegister *)0xb0)).bit5)
#define	FIHRCU4	((*((__RAM struct specialRegister *)0xb0)).bit4)
#define	FIHRCU3	((*((__RAM struct specialRegister *)0xb0)).bit3)
#define	FIHRCU2	((*((__RAM struct specialRegister *)0xb0)).bit2)
#define	FIHRCU1	((*((__RAM struct specialRegister *)0xb0)).bit1)
#define	FEP0_IN_STALL	((*((__RAM struct specialRegister *)0xb0)).bit0)
#define	IHRCL	(*((__RAM unsigned int*)0xb1))
#define	FIHRCL5	((*((__RAM struct specialRegister *)0xb1)).bit5)
#define	FIHRCL4	((*((__RAM struct specialRegister *)0xb1)).bit4)
#define	FIHRCL3	((*((__RAM struct specialRegister *)0xb1)).bit3)
#define	FIHRCL2	((*((__RAM struct specialRegister *)0xb1)).bit2)
#define	FIHRCL1	((*((__RAM struct specialRegister *)0xb1)).bit1)
#define	FEP0_OUT_STALL	((*((__RAM struct specialRegister *)0xb1)).bit0)
#define	SIOM	(*((__RAM unsigned int*)0xb4))
#define	FSENB	((*((__RAM struct specialRegister *)0xb4)).bit7)
#define	FSTART	((*((__RAM struct specialRegister *)0xb4)).bit6)
#define	FSRATE1	((*((__RAM struct specialRegister *)0xb4)).bit5)
#define	FSRATE0	((*((__RAM struct specialRegister *)0xb4)).bit4)
#define	FMLSB	((*((__RAM struct specialRegister *)0xb4)).bit3)
#define	FSCKMD	((*((__RAM struct specialRegister *)0xb4)).bit2)
#define	FCPOL	((*((__RAM struct specialRegister *)0xb4)).bit1)
#define	FCPHA	((*((__RAM struct specialRegister *)0xb4)).bit0)
#define	SIOR	(*((__RAM unsigned int*)0xb5))
#define	SIOB	(*((__RAM unsigned int*)0xb6))
#define	P0M	(*((__RAM unsigned int*)0xb8))
#define	FP02M	((*((__RAM struct specialRegister *)0xb8)).bit2)
#define	FP01M	((*((__RAM struct specialRegister *)0xb8)).bit1)
#define	FP00M	((*((__RAM struct specialRegister *)0xb8)).bit0)
#define	PECMD	(*((__RAM unsigned int*)0xba))
#define	PEROML	(*((__RAM unsigned int*)0xbb))
#define	PEROMH	(*((__RAM unsigned int*)0xbc))
#define	PERAML	(*((__RAM unsigned int*)0xbd))
#define	PERAMCNT	(*((__RAM unsigned int*)0xbe))
#define	PERAMCNT4	((*((__RAM struct specialRegister *)0xbe)).bit7)
#define	PERAMCNT3	((*((__RAM struct specialRegister *)0xbe)).bit6)
#define	PERAMCNT2	((*((__RAM struct specialRegister *)0xbe)).bit5)
#define	PERAMCNT1	((*((__RAM struct specialRegister *)0xbe)).bit4)
#define	PERAMCNT0	((*((__RAM struct specialRegister *)0xbe)).bit3)
#define	PERAML8	((*((__RAM struct specialRegister *)0xbe)).bit0)
#define	PEDGE	(*((__RAM unsigned int*)0xbf))
#define	FP01G1	((*((__RAM struct specialRegister *)0xbf)).bit3)
#define	FP01G0	((*((__RAM struct specialRegister *)0xbf)).bit2)
#define	FP00G1	((*((__RAM struct specialRegister *)0xbf)).bit1)
#define	FP00G0	((*((__RAM struct specialRegister *)0xbf)).bit0)
#define	P1W	(*((__RAM unsigned int*)0xc0))
#define	FP16W	((*((__RAM struct specialRegister *)0xc0)).bit6)
#define	FP15W	((*((__RAM struct specialRegister *)0xc0)).bit5)
#define	FP14W	((*((__RAM struct specialRegister *)0xc0)).bit4)
#define	FP13W	((*((__RAM struct specialRegister *)0xc0)).bit3)
#define	FP12W	((*((__RAM struct specialRegister *)0xc0)).bit2)
#define	FP11W	((*((__RAM struct specialRegister *)0xc0)).bit1)
#define	FP10W	((*((__RAM struct specialRegister *)0xc0)).bit0)
#define	P1M	(*((__RAM unsigned int*)0xc1))
#define	FP16M	((*((__RAM struct specialRegister *)0xc1)).bit6)
#define	FP15M	((*((__RAM struct specialRegister *)0xc1)).bit5)
#define	FP14M	((*((__RAM struct specialRegister *)0xc1)).bit4)
#define	FP13M	((*((__RAM struct specialRegister *)0xc1)).bit3)
#define	FP12M	((*((__RAM struct specialRegister *)0xc1)).bit2)
#define	FP11M	((*((__RAM struct specialRegister *)0xc1)).bit1)
#define	FP10M	((*((__RAM struct specialRegister *)0xc1)).bit0)
#define	P5M	(*((__RAM unsigned int*)0xc5))
#define	FP53M	((*((__RAM struct specialRegister *)0xc5)).bit3)
#define	FP52M	((*((__RAM struct specialRegister *)0xc5)).bit2)
#define	FP51M	((*((__RAM struct specialRegister *)0xc5)).bit1)
#define	FP50M	((*((__RAM struct specialRegister *)0xc5)).bit0)
#define	INTRQ	(*((__RAM unsigned int*)0xc8))
#define	FUSBIRQ	((*((__RAM struct specialRegister *)0xc8)).bit6)
#define	FTC0IRQ	((*((__RAM struct specialRegister *)0xc8)).bit5)
#define	FT0IRQ	((*((__RAM struct specialRegister *)0xc8)).bit4)
#define	FSIOIRQ	((*((__RAM struct specialRegister *)0xc8)).bit3)
#define	FWAKEIRQ	((*((__RAM struct specialRegister *)0xc8)).bit2)
#define	FP01IRQ	((*((__RAM struct specialRegister *)0xc8)).bit1)
#define	FP00IRQ	((*((__RAM struct specialRegister *)0xc8)).bit0)
#define	INTEN	(*((__RAM unsigned int*)0xc9))
#define	FUSBIEN	((*((__RAM struct specialRegister *)0xc9)).bit6)
#define	FTC0IEN	((*((__RAM struct specialRegister *)0xc9)).bit5)
#define	FT0IEN	((*((__RAM struct specialRegister *)0xc9)).bit4)
#define	FSIOIEN	((*((__RAM struct specialRegister *)0xc9)).bit3)
#define	FWAKEIEN	((*((__RAM struct specialRegister *)0xc9)).bit2)
#define	FP01IEN	((*((__RAM struct specialRegister *)0xc9)).bit1)
#define	FP00IEN	((*((__RAM struct specialRegister *)0xc9)).bit0)
#define	OSCM	(*((__RAM unsigned int*)0xca))
#define	FCPUM1	((*((__RAM struct specialRegister *)0xca)).bit4)
#define	FCPUM0	((*((__RAM struct specialRegister *)0xca)).bit3)
#define	FCLKMD	((*((__RAM struct specialRegister *)0xca)).bit2)
#define	FSTPHX	((*((__RAM struct specialRegister *)0xca)).bit1)
#define	WDTR	(*((__RAM unsigned int*)0xcc))
#define	PCL	(*((__RAM unsigned int*)0xce))
#define	PCH	(*((__RAM unsigned int*)0xcf))
#define	P0	(*((__RAM unsigned int*)0xd0))
#define	FP02	((*((__RAM struct specialRegister *)0xd0)).bit2)
#define	FP01	((*((__RAM struct specialRegister *)0xd0)).bit1)
#define	FP00	((*((__RAM struct specialRegister *)0xd0)).bit0)
#define	P1	(*((__RAM unsigned int*)0xd1))
#define	FP16	((*((__RAM struct specialRegister *)0xd1)).bit6)
#define	FP15	((*((__RAM struct specialRegister *)0xd1)).bit5)
#define	FP14	((*((__RAM struct specialRegister *)0xd1)).bit4)
#define	FP13	((*((__RAM struct specialRegister *)0xd1)).bit3)
#define	FP12	((*((__RAM struct specialRegister *)0xd1)).bit2)
#define	FP11	((*((__RAM struct specialRegister *)0xd1)).bit1)
#define	FP10	((*((__RAM struct specialRegister *)0xd1)).bit0)
#define	P5	(*((__RAM unsigned int*)0xd5))
#define	FP53	((*((__RAM struct specialRegister *)0xd5)).bit3)
#define	FP52	((*((__RAM struct specialRegister *)0xd5)).bit2)
#define	FP51	((*((__RAM struct specialRegister *)0xd5)).bit1)
#define	FP50	((*((__RAM struct specialRegister *)0xd5)).bit0)
#define	T0M	(*((__RAM unsigned int*)0xd8))
#define	FT0ENB	((*((__RAM struct specialRegister *)0xd8)).bit7)
#define	FT0RATE2	((*((__RAM struct specialRegister *)0xd8)).bit6)
#define	FT0RATE1	((*((__RAM struct specialRegister *)0xd8)).bit5)
#define	FT0RATE0	((*((__RAM struct specialRegister *)0xd8)).bit4)
#define	T0C	(*((__RAM unsigned int*)0xd9))
#define	STKP	(*((__RAM unsigned int*)0xdf))
#define	FGIE	((*((__RAM struct specialRegister *)0xdf)).bit7)
#define	FSTKPB2	((*((__RAM struct specialRegister *)0xdf)).bit2)
#define	FSTKPB1	((*((__RAM struct specialRegister *)0xdf)).bit1)
#define	FSTKPB0	((*((__RAM struct specialRegister *)0xdf)).bit0)
#define	P0UR	(*((__RAM unsigned int*)0xe0))
#define	P1UR	(*((__RAM unsigned int*)0xe1))
#define	P5UR	(*((__RAM unsigned int*)0xe5))
#define	_YZ	(*((__RAM unsigned int*)0xe7))
#define	STK7L	(*((__RAM unsigned int*)0xf0))
#define	STK7H	(*((__RAM unsigned int*)0xf1))
#define	STK6L	(*((__RAM unsigned int*)0xf2))
#define	STK6H	(*((__RAM unsigned int*)0xf3))
#define	STK5L	(*((__RAM unsigned int*)0xf4))
#define	STK5H	(*((__RAM unsigned int*)0xf5))
#define	STK4L	(*((__RAM unsigned int*)0xf6))
#define	STK4H	(*((__RAM unsigned int*)0xf7))
#define	STK3L	(*((__RAM unsigned int*)0xf8))
#define	STK3H	(*((__RAM unsigned int*)0xf9))
#define	STK2L	(*((__RAM unsigned int*)0xfa))
#define	STK2H	(*((__RAM unsigned int*)0xfb))
#define	STK1L	(*((__RAM unsigned int*)0xfc))
#define	STK1H	(*((__RAM unsigned int*)0xfd))
#define	STK0L	(*((__RAM unsigned int*)0xfe))
#define	STK0H	(*((__RAM unsigned int*)0xff))
#define SLEEPMODE __asm{SleepMode}
#define GREENMODE __asm{GreenMode}
#define SLOWMODE __asm{SlowMode}
#define SLOW2NORMAL __asm{Slow2Normal}
#endif
