/**************************************************************
//V1.3：按照《HSmcu_HeadFile_定义参考说明-V1.00-20241119》编辑
//Special function register definitions
IC Type Support:
	,
//Updata:20241120
//Designer:LBW
**************************************************************/

/****************************************************   
;Copyright (.h) 2025   苏州华芯微电子股份有限公司 	*   
;					       							*   
;文件名称:    HS6005X.h                			*   
;文件标识:					    					*   
;摘    要:											*   
;**************************************************** 
;当前版本:		simV2-check	 						*   
;作    者:			                    			*   
;完成日期:		2025-06-11              			*   
;****************************************************   
;【features】
;39-RISC-instruct
;ROM:		1K*14-ROM
;RAM:		64*BYTE-RAM
;TP0
;TC0
;COMPCON
;stack：	5
;INT/INT1
;IOB
;
/**************************************************************
//Special function register definitions
**************************************************************/

#ifndef __HS6005X_H
#define __HS6005X_H


//------------------------------------------------------//
typedef		signed char 				s8;   //有符号数
typedef		signed int 					s16;
typedef		signed long 				s32;
			
typedef		unsigned char 				u8;   //无符号整数
typedef		unsigned int  				u16;
typedef		unsigned long 				u32;
			
typedef		volatile unsigned char 		vu8; //无符号整数
typedef		volatile unsigned int  		vu16;
typedef		volatile unsigned long 		vu32;
  

//------------------------------------------------------//
//#define		NOP()		asm("NOP")    
//#define		CLRWDT()	asm("clrwdt")    
//#define		SLEEP()		asm("sleep")  


#define		NOP			asm("NOP")
#define		CLRWDT		asm("clrwdt")
#define		SLEEP		asm("sleep")


//------------------------------------------------------------
// system public Special function register definitions
//------------------------------------------------------------


volatile unsigned char		INDF		@ 0x000;


volatile unsigned char		PCL			@ 0x002;


volatile unsigned char		STATUS		@ 0x003;
	volatile bit	IRP				@ ((unsigned) & STATUS * 8) + 7;
	volatile bit	RP1				@ ((unsigned) & STATUS * 8) + 6;
	volatile bit	RP0				@ ((unsigned) & STATUS * 8) + 5;
	volatile bit	TO				@ ((unsigned) & STATUS * 8) + 4;
	volatile bit	PD				@ ((unsigned) & STATUS * 8) + 3;
	volatile bit	Z 				@ ((unsigned) & STATUS * 8) + 2;
	volatile bit	DC				@ ((unsigned) & STATUS * 8) + 1;
	volatile bit	C 				@ ((unsigned) & STATUS * 8) + 0;
																
	volatile bit	FIRP			@ ((unsigned) & STATUS * 8) + 7;
	volatile bit	FRP1			@ ((unsigned) & STATUS * 8) + 6;
	volatile bit	FRP0			@ ((unsigned) & STATUS * 8) + 5;
	volatile bit	FTO				@ ((unsigned) & STATUS * 8) + 4;
	volatile bit	FPD				@ ((unsigned) & STATUS * 8) + 3;
	volatile bit	FZ 				@ ((unsigned) & STATUS * 8) + 2;
	volatile bit	FDC				@ ((unsigned) & STATUS * 8) + 1;
	volatile bit	FC 				@ ((unsigned) & STATUS * 8) + 0;


volatile unsigned char		FSR			@ 0x004;
	volatile bit 	FSR7			@ ((unsigned) & FSR * 8) + 7;
	
	volatile bit 	FFSR7			@ ((unsigned) & FSR * 8) + 7;


volatile unsigned char		PCLATH		@ 0x00A;
#define		PCHBUF		PCLATH
	volatile bit 	PCH2			@ ((unsigned) & PCLATH * 8) + 2;
	volatile bit 	PCH1			@ ((unsigned) & PCLATH * 8) + 1;
	volatile bit 	PCH0			@ ((unsigned) & PCLATH * 8) + 0;
	
	volatile bit 	FPCH2			@ ((unsigned) & PCLATH * 8) + 2;
	volatile bit 	FPCH1			@ ((unsigned) & PCLATH * 8) + 1;
	volatile bit 	FPCH0			@ ((unsigned) & PCLATH * 8) + 0;


volatile unsigned char		INTEN		@ 0x00B;
	volatile bit	GIE   			@ ((unsigned) & INTEN * 8) + 7;
	volatile bit	INT1IE			@ ((unsigned) & INTEN * 8) + 5;
	volatile bit	TP0IE 			@ ((unsigned) & INTEN * 8) + 4;
	volatile bit	TC0IE 			@ ((unsigned) & INTEN * 8) + 3;
	volatile bit	INTIE 			@ ((unsigned) & INTEN * 8) + 2;
	volatile bit	PBIE  			@ ((unsigned) & INTEN * 8) + 1;

	volatile bit	FGIE   			@ ((unsigned) & INTEN * 8) + 7;
	volatile bit	FINT1IE			@ ((unsigned) & INTEN * 8) + 5;
	volatile bit	FTP0IE 			@ ((unsigned) & INTEN * 8) + 4;
	volatile bit	FTC0IE 			@ ((unsigned) & INTEN * 8) + 3;
	volatile bit	FINTIE 			@ ((unsigned) & INTEN * 8) + 2;
	volatile bit	FPBIE  			@ ((unsigned) & INTEN * 8) + 1;
	

volatile unsigned char		INTFLAG		@ 0x00C;
	volatile bit 	INT1IF			@ ((unsigned) & INTFLAG * 8) + 5;
	volatile bit 	TP0IF 			@ ((unsigned) & INTFLAG * 8) + 4;
	volatile bit 	TC0IF 			@ ((unsigned) & INTFLAG * 8) + 3;
	volatile bit 	INTIF 			@ ((unsigned) & INTFLAG * 8) + 2;
	volatile bit 	PBIF  			@ ((unsigned) & INTFLAG * 8) + 1;

	volatile bit 	FINT1IF			@ ((unsigned) & INTFLAG * 8) + 5;
	volatile bit 	FTP0IF 			@ ((unsigned) & INTFLAG * 8) + 4;
	volatile bit 	FTC0IF 			@ ((unsigned) & INTFLAG * 8) + 3;
	volatile bit 	FINTIF 			@ ((unsigned) & INTFLAG * 8) + 2;
	volatile bit 	FPBIF  			@ ((unsigned) & INTFLAG * 8) + 1;
	

//------------------------------------------------------------
// BANK0 Special function register definitions
//------------------------------------------------------------


volatile unsigned char		PORTB		@ 0x006;
	volatile bit 	PB5				@ ((unsigned) & PORTB * 8) + 5;
	volatile bit 	PB4				@ ((unsigned) & PORTB * 8) + 4;
	volatile bit 	PB3				@ ((unsigned) & PORTB * 8) + 3;
	volatile bit 	PB2				@ ((unsigned) & PORTB * 8) + 2;
	volatile bit 	PB1				@ ((unsigned) & PORTB * 8) + 1;
	volatile bit 	PB0				@ ((unsigned) & PORTB * 8) + 0;

	volatile bit 	FPB5			@ ((unsigned) & PORTB * 8) + 5;
	volatile bit 	FPB4			@ ((unsigned) & PORTB * 8) + 4;
	volatile bit 	FPB3			@ ((unsigned) & PORTB * 8) + 3;
	volatile bit 	FPB2			@ ((unsigned) & PORTB * 8) + 2;
	volatile bit 	FPB1			@ ((unsigned) & PORTB * 8) + 1;
	volatile bit 	FPB0			@ ((unsigned) & PORTB * 8) + 0;
	

volatile unsigned char		INTFLAG1	@ 0x00D; 
	volatile bit 	COMINTF			@ ((unsigned) & INTFLAG1 * 8) + 1;
	
	volatile bit 	FCOMINTF		@ ((unsigned) & INTFLAG1 * 8) + 1;


volatile unsigned char		PDCON		@ 0x00E;
	volatile bit 	PDB3			@ ((unsigned) & PDCON * 8) + 7;
	volatile bit 	PDB2			@ ((unsigned) & PDCON * 8) + 6;
	volatile bit 	PDB1			@ ((unsigned) & PDCON * 8) + 5;
	volatile bit 	PDB0			@ ((unsigned) & PDCON * 8) + 4;

	volatile bit 	FPDB3			@ ((unsigned) & PDCON * 8) + 7;
	volatile bit 	FPDB2			@ ((unsigned) & PDCON * 8) + 6;
	volatile bit 	FPDB1			@ ((unsigned) & PDCON * 8) + 5;
	volatile bit 	FPDB0			@ ((unsigned) & PDCON * 8) + 4;
	

volatile unsigned char		ODCON		@ 0x00F;
	volatile bit 	ODB5			@ ((unsigned) & ODCON * 8) + 5; 
	volatile bit 	ODB4			@ ((unsigned) & ODCON * 8) + 4;
	volatile bit 	ODB3			@ ((unsigned) & ODCON * 8) + 3;
	volatile bit 	ODB2			@ ((unsigned) & ODCON * 8) + 2;
	volatile bit 	ODB1			@ ((unsigned) & ODCON * 8) + 1;
	volatile bit 	ODB0			@ ((unsigned) & ODCON * 8) + 0;

	volatile bit 	FODB5			@ ((unsigned) & ODCON * 8) + 5; 
	volatile bit 	FODB4			@ ((unsigned) & ODCON * 8) + 4;
	volatile bit 	FODB3			@ ((unsigned) & ODCON * 8) + 3;
	volatile bit 	FODB2			@ ((unsigned) & ODCON * 8) + 2;
	volatile bit 	FODB1			@ ((unsigned) & ODCON * 8) + 1;
	volatile bit 	FODB0			@ ((unsigned) & ODCON * 8) + 0;
	
	
volatile unsigned char		PHCON		@ 0x010;
	volatile bit 	PHB5			@ ((unsigned) & PHCON * 8) + 5;
	volatile bit 	PHB4			@ ((unsigned) & PHCON * 8) + 4;
	volatile bit 	PHB3			@ ((unsigned) & PHCON * 8) + 3;
	volatile bit 	PHB2			@ ((unsigned) & PHCON * 8) + 2;
	volatile bit 	PHB1			@ ((unsigned) & PHCON * 8) + 1;
	volatile bit 	PHB0			@ ((unsigned) & PHCON * 8) + 0;
	
	volatile bit 	FPHB5			@ ((unsigned) & PHCON * 8) + 5;
	volatile bit 	FPHB4			@ ((unsigned) & PHCON * 8) + 4;
	volatile bit 	FPHB3			@ ((unsigned) & PHCON * 8) + 3;
	volatile bit 	FPHB2			@ ((unsigned) & PHCON * 8) + 2;
	volatile bit 	FPHB1			@ ((unsigned) & PHCON * 8) + 1;
	volatile bit 	FPHB0			@ ((unsigned) & PHCON * 8) + 0;
	

volatile unsigned char		TC0L		@ 0x011;


volatile unsigned char		TC0M		@ 0x012;
	volatile bit 	TC0TR 			@ ((unsigned) & TC0M * 8) + 7;
	volatile bit 	TC0S2 			@ ((unsigned) & TC0M * 8) + 6;
	volatile bit 	TC0S1 			@ ((unsigned) & TC0M * 8) + 5;
	volatile bit 	TC0S0 			@ ((unsigned) & TC0M * 8) + 4;
	volatile bit 	TCCKS 			@ ((unsigned) & TC0M * 8) + 3;
	volatile bit 	T16SEL			@ ((unsigned) & TC0M * 8) + 2;
	volatile bit 	BUZ   			@ ((unsigned) & TC0M * 8) + 1;
	volatile bit 	PWM0  			@ ((unsigned) & TC0M * 8) + 0;

	volatile bit 	FTC0TR 			@ ((unsigned) & TC0M * 8) + 7;
	volatile bit 	FTC0S2 			@ ((unsigned) & TC0M * 8) + 6;
	volatile bit 	FTC0S1 			@ ((unsigned) & TC0M * 8) + 5;
	volatile bit 	FTC0S0 			@ ((unsigned) & TC0M * 8) + 4;
	volatile bit 	FTCCKS 			@ ((unsigned) & TC0M * 8) + 3;
	volatile bit 	FT16SEL			@ ((unsigned) & TC0M * 8) + 2;
	volatile bit 	FBUZ   			@ ((unsigned) & TC0M * 8) + 1;
	volatile bit 	FPWM0  			@ ((unsigned) & TC0M * 8) + 0;
	
	
//General USER RAM 
//20H~3FH-null
//40H~6FH-48*bytes
//70H~7FH-16bytes
//General USER RAM 

//------------------------------------------------------------
// BANK1 Special function register definitions
//------------------------------------------------------------


volatile unsigned char		OPTIONR		@ 0x081; 
#define 	OPTION 		OPTIONR
#define 	OPTION_REG 	OPTIONR
	volatile bit 	INTEDG1			@ ((unsigned) & OPTIONR * 8) + 7;
	volatile bit 	INTEDG			@ ((unsigned) & OPTIONR * 8) + 6;

	volatile bit 	FINTEDG1		@ ((unsigned) & OPTIONR * 8) + 7;
	volatile bit 	FINTEDG			@ ((unsigned) & OPTIONR * 8) + 6;
	

volatile unsigned char		TRISB		@ 0x086; 
#define 	IOSTB		TRISB
	volatile bit 	TRISB5			@ ((unsigned) & TRISB * 8) + 5;
	volatile bit 	TRISB4			@ ((unsigned) & TRISB * 8) + 4;
	volatile bit 	TRISB3			@ ((unsigned) & TRISB * 8) + 3;
	volatile bit 	TRISB2			@ ((unsigned) & TRISB * 8) + 2;
	volatile bit 	TRISB1			@ ((unsigned) & TRISB * 8) + 1;
	volatile bit 	TRISB0			@ ((unsigned) & TRISB * 8) + 0;
	
	volatile bit 	FTRISB5			@ ((unsigned) & TRISB * 8) + 5;
	volatile bit 	FTRISB4			@ ((unsigned) & TRISB * 8) + 4;
	volatile bit 	FTRISB3			@ ((unsigned) & TRISB * 8) + 3;
	volatile bit 	FTRISB2			@ ((unsigned) & TRISB * 8) + 2;
	volatile bit 	FTRISB1			@ ((unsigned) & TRISB * 8) + 1;
	volatile bit 	FTRISB0			@ ((unsigned) & TRISB * 8) + 0;
	

volatile unsigned char		INTEN1		@ 0x08D;
	volatile bit 	COMINTEN		@ ((unsigned) & INTEN1 * 8) + 1;

	volatile bit 	FCOMINTEN		@ ((unsigned) & INTEN1 * 8) + 1;


volatile unsigned char		PCON		@ 0x08E;
	volatile bit 	WDTE			@ ((unsigned) & PCON * 8) + 7;
	volatile bit 	LVDTE			@ ((unsigned) & PCON * 8) + 5;
	volatile bit 	LVREN			@ ((unsigned) & PCON * 8) + 5;
	
	volatile bit 	FWDTE			@ ((unsigned) & PCON * 8) + 7;
	volatile bit 	FLVDTE			@ ((unsigned) & PCON * 8) + 5;
	volatile bit 	FLVREN			@ ((unsigned) & PCON * 8) + 5;


volatile unsigned char		WUCON		@ 0x08F;
	volatile bit	WUB5			@ ((unsigned) & WUCON * 8) + 5;
	volatile bit	WUB4			@ ((unsigned) & WUCON * 8) + 4;
	volatile bit	WUB3			@ ((unsigned) & WUCON * 8) + 3;
	volatile bit	WUB2			@ ((unsigned) & WUCON * 8) + 2;
	volatile bit	WUB1			@ ((unsigned) & WUCON * 8) + 1;
	volatile bit	WUB0			@ ((unsigned) & WUCON * 8) + 0;

	volatile bit	FWUB5			@ ((unsigned) & WUCON * 8) + 5;
	volatile bit	FWUB4			@ ((unsigned) & WUCON * 8) + 4;
	volatile bit	FWUB3			@ ((unsigned) & WUCON * 8) + 3;
	volatile bit	FWUB2			@ ((unsigned) & WUCON * 8) + 2;
	volatile bit	FWUB1			@ ((unsigned) & WUCON * 8) + 1;
	volatile bit	FWUB0			@ ((unsigned) & WUCON * 8) + 0;
	
	
volatile unsigned char		PDCON1		@ 0x093;
	volatile bit	PDB5			@ ((unsigned) & PDCON1 * 8) + 1;
	volatile bit	PDB4			@ ((unsigned) & PDCON1 * 8) + 0;

	volatile bit	FPDB5			@ ((unsigned) & PDCON1 * 8) + 1;
	volatile bit	FPDB4			@ ((unsigned) & PDCON1 * 8) + 0;
	

volatile unsigned char		OSCM		@ 0x094;
	volatile bit	WAKEMODE		@ ((unsigned) & OSCM * 8) + 6;
	volatile bit	GREENEN			@ ((unsigned) & OSCM * 8) + 5;
	volatile bit	SLT0CON			@ ((unsigned) & OSCM * 8) + 4;
	volatile bit	SLT0C			@ ((unsigned) & OSCM * 8) + 4;
	volatile bit	SLCON			@ ((unsigned) & OSCM * 8) + 3;
	volatile bit	STPHX			@ ((unsigned) & OSCM * 8) + 1;
	volatile bit	CLKMD			@ ((unsigned) & OSCM * 8) + 0;

	volatile bit	FWAKEMODE		@ ((unsigned) & OSCM * 8) + 6;
	volatile bit	FGREENEN		@ ((unsigned) & OSCM * 8) + 5;
	volatile bit	FSLT0CON		@ ((unsigned) & OSCM * 8) + 4;
	volatile bit	FSLT0C			@ ((unsigned) & OSCM * 8) + 4;
	volatile bit	FSLCON			@ ((unsigned) & OSCM * 8) + 3;
	volatile bit	FSTPHX			@ ((unsigned) & OSCM * 8) + 1;
	volatile bit	FCLKMD			@ ((unsigned) & OSCM * 8) + 0;
	
	
//------------------------------------------------------------
// BANK2 Special function register definitions
//------------------------------------------------------------


volatile unsigned char		PWM0EN		@ 0x111;
	volatile bit 	TP0EN			@ ((unsigned) & PWM0EN * 8) + 7; 
	volatile bit 	PWM0E			@ ((unsigned) & PWM0EN * 8) + 1;
	volatile bit 	LOADEN			@ ((unsigned) & PWM0EN * 8) + 0;

	volatile bit 	FTP0EN			@ ((unsigned) & PWM0EN * 8) + 7; 
	volatile bit 	FPWM0E			@ ((unsigned) & PWM0EN * 8) + 1;
	volatile bit 	FLOADEN			@ ((unsigned) & PWM0EN * 8) + 0;
	

volatile unsigned char		PWM0C		@ 0x112;
	volatile bit	CK0_3			@ ((unsigned) & PWM0C * 8) + 7;
	volatile bit	CK0_2			@ ((unsigned) & PWM0C * 8) + 6;
	volatile bit	PWM0S1			@ ((unsigned) & PWM0C * 8) + 3;
	volatile bit	CK0_1			@ ((unsigned) & PWM0C * 8) + 1;
	volatile bit	CK0_0			@ ((unsigned) & PWM0C * 8) + 0;
                                                               
	volatile bit	FCK0_3			@ ((unsigned) & PWM0C * 8) + 7;
	volatile bit	FCK0_2			@ ((unsigned) & PWM0C * 8) + 6;
	volatile bit	FPWM0S1			@ ((unsigned) & PWM0C * 8) + 3;
	volatile bit	FCK0_1			@ ((unsigned) & PWM0C * 8) + 1;
	volatile bit	FCK0_0			@ ((unsigned) & PWM0C * 8) + 0;
	

volatile unsigned char		PWM0TL		@ 0x113;


volatile unsigned char		PWM0PL		@ 0x115;


volatile unsigned char		PWM0DL		@ 0x117;


volatile unsigned char		PWMPSCON	@ 0x11B;
	volatile bit	PWMPS2			@ ((unsigned) & PWMPSCON * 8) + 2;
	volatile bit	PWMPS1			@ ((unsigned) & PWMPSCON * 8) + 1;
	volatile bit	PWMPS0			@ ((unsigned) & PWMPSCON * 8) + 0;

	volatile bit	FPWMPS2			@ ((unsigned) & PWMPSCON * 8) + 2;
	volatile bit	FPWMPS1			@ ((unsigned) & PWMPSCON * 8) + 1;
	volatile bit	FPWMPS0			@ ((unsigned) & PWMPSCON * 8) + 0;
	

//------------------------------------------------------------
// BANK3 Special function register definitions
//------------------------------------------------------------


volatile unsigned char		CMPCON		@ 0x19E;
#define		CMPC		CMPCON
	volatile bit	CMPEN			@ ((unsigned) & CMPCON * 8) + 7;
	volatile bit	CMPIF			@ ((unsigned) & CMPCON * 8) + 6;
	volatile bit	FTCKS			@ ((unsigned) & CMPCON * 8) + 5;
	volatile bit	CODEB			@ ((unsigned) & CMPCON * 8) + 4;
	volatile bit	CPEN 			@ ((unsigned) & CMPCON * 8) + 3;
	volatile bit	CVEN 			@ ((unsigned) & CMPCON * 8) + 2;
	volatile bit	COPOL			@ ((unsigned) & CMPCON * 8) + 1;

	volatile bit	FCMPEN			@ ((unsigned) & CMPCON * 8) + 7;
	volatile bit	FCMPIF			@ ((unsigned) & CMPCON * 8) + 6;
	volatile bit	FFTCKS			@ ((unsigned) & CMPCON * 8) + 5;
	volatile bit	FCODEB			@ ((unsigned) & CMPCON * 8) + 4;
	volatile bit	FCPEN 			@ ((unsigned) & CMPCON * 8) + 3;
	volatile bit	FCVEN 			@ ((unsigned) & CMPCON * 8) + 2;
	volatile bit	FCOPOL			@ ((unsigned) & CMPCON * 8) + 1;
	

volatile unsigned char		CMPM		@ 0x19F;
	volatile bit	CV1EN 			@ ((unsigned) & CMPM * 8) + 7;
	volatile bit	CPINS1			@ ((unsigned) & CMPM * 8) + 6;
	volatile bit	CPINS0			@ ((unsigned) & CMPM * 8) + 5;
	volatile bit	XRVSEL			@ ((unsigned) & CMPM * 8) + 4;
	volatile bit	VRS3  			@ ((unsigned) & CMPM * 8) + 3;
	volatile bit	VRS2  			@ ((unsigned) & CMPM * 8) + 2;
	volatile bit	VRS1  			@ ((unsigned) & CMPM * 8) + 1;
	volatile bit	VRS0  			@ ((unsigned) & CMPM * 8) + 0;
                                                  
	volatile bit	FCV1EN 			@ ((unsigned) & CMPM * 8) + 7;
	volatile bit	FCPINS1			@ ((unsigned) & CMPM * 8) + 6;
	volatile bit	FCPINS0			@ ((unsigned) & CMPM * 8) + 5;
	volatile bit	FXRVSEL			@ ((unsigned) & CMPM * 8) + 4;
	volatile bit	FVRS3  			@ ((unsigned) & CMPM * 8) + 3;
	volatile bit	FVRS2  			@ ((unsigned) & CMPM * 8) + 2;
	volatile bit	FVRS1  			@ ((unsigned) & CMPM * 8) + 1;
	volatile bit	FVRS0  			@ ((unsigned) & CMPM * 8) + 0;
	
	
//------------------------------------------------------------
// BANK-end Special function register definitions
//------------------------------------------------------------


/*******************************************************
					位定义
********************************************************/
//#define	Set(x,y)	((x) |= (1 << (y)))				//位置1
//#define	Clr(x,y)	((x) &= ~ (1 << (y)))			//位清0

//#define	b0(x,y)		(((x) & (1 << (y))) == 0)		//位0判断 if(b0(x,y)) 判断是否为0
//#define	b1(x,y)		((x) & (1 << (y)))				//位1判断 if(b1(x,y)) 判断是否为1


//******************************************************************
//仅供C嵌ASM
//指令转换预编译处理
/****嵌入单挑汇编****
	asm("NOP")
/****嵌入汇编模块****
	//C中嵌入ASM，指令操作 寄存器 前面需要加下划线“_”;
#asm
	CLRF	_INDF
	DECF	_FSR,F	
#endasm
*/
/******************************************************************
#define		BCR		BCF
#define		BSR		BSF

#define		BTRSC	BTFSC
#define		BTRSS	BTFSS

#define		NOP		asm("NOP");   
#define		CLRWDT	asm("clrwdt");    
#define		SLEEP	asm("sleep");

#define		CLRA	CLRW
#define		CLRR	CLRF

#define		MOVAR	MOVWF
#define		MOVR	MOVF

#define		DECR	DECF
#define		DECRSZ	DECFSZ

#define		INCR	INCF
#define		INCRSZ	INCFSZ

#define		ADDAR	ADDWF
#define		SUBAR	SUBWF

#define		ANDAR	ANDWF
#define		IORAR	IORWF

#define		XORAR	XORWF
#define		COMR	COMF

#define		RLR		RLF
#define		RRR		RRF

#define		SWAPR	SWAPF
#define		MOVIA	MOVLW

#define		ADDIA	ADDLW
#define		SUBIA	SUBLW

#define		ANDIA	ANDLW
#define		IORIA	IORLW

#define		XORIA	XORLW
#define		RETIA	RETLW

//******************************************************************/
   

#endif
/*
;*****************************************************   
;PIN-DEFINE   
;****************************************************  
;	    VDD -1		8 - VSS	                   *   
;	    PB5	-2		7 - PB0	                   *   
;	    PB4	-3		6 - PB1	                   *   
;	    PB3	-4		5 - PB2	                   *   
;**************************************************** 
*/
/*
// Register: OPAM
volatile unsigned char           OPAM               @ 0x0DB; //0X5B
// bit and bitfield definitions
volatile bit MULTS0                @ ((unsigned)&OPAM*8)+0;
volatile bit MULTS1                @ ((unsigned)&OPAM*8)+1;
volatile bit OPAMEN                @ ((unsigned)&OPAM*8)+2;
volatile bit COMMS                 @ ((unsigned)&OPAM*8)+3;

#ifndef _LIB_BUILD
volatile union {
    struct {
        unsigned	MULTS0              : 1;
        unsigned	MULTS1              : 1;
        unsigned	OPAMEN              : 1;
        unsigned	COMMS               : 1; 
        unsigned	                    : 4;
    };
} OPAMbits @ 0x0DB;
#endif
*/
//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$
//$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$

/*
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
变量定义 ：
bit				1	==布尔型位变量，0或1两种取值
char			8	==有符号或无符号字符变量，
unsigned char	8	==无符号字符变量
short			16	==有符号整型数
unsigned short	16	==无符号整型数
int				16	==有符号整型数
unsigned int	16	==无符号整型数
long			32	==有符号长整型
unsigned long	32	==无符号长整型
float			24	==浮点数
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BANK数据寄存器定义的管理
如果没有特别说明，所定义的变量降被定义在Bank0;除了Bank0内的变量声明不需要特殊处理外，
定义在其它Bank内的变量前面必须加上相应的bank序号，例如
	bank1 unsigned char buffer[2]	;变量定位在bank0
	bank2 bit flag1,flag2	;变量定位在bank2(如果硬件有bank2)
	bank3 int U16_tmp0,U16_tmp1	;变量定位在bank3(如果硬件有bank3)
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其它变量修饰关键词:
extern - 外部变量声明；如果在一个C程序文件中要使用一些变量但其原型定义写在另外的文件中，
	那么在本文件中必须将这些变量声明成“extern ”外部类型。

volatile —易变型变量声明。
const  —  常数型变量声明。
persistent —  非初始化变量声明。
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*/
