<?xml version="1.0" encoding="UTF-8"?>
<chip>
	<configure-file-ver>1.0</configure-file-ver>
	<chip-name>HS6253</chip-name>
	<chip-classes>IR MCU</chip-classes>
	<chip-id>C1</chip-id>
	<chip-ver>0</chip-ver>
	<ccs-file-ver>4</ccs-file-ver>
	<ram-start-addr>0</ram-start-addr>
	<ram-size>256</ram-size>
	<otp-body-size>4096</otp-body-size>
	<user-rom-size>4088</user-rom-size>
	<reset-addr>0</reset-addr>
	<stack-level>8</stack-level>
	<config-word-count>5</config-word-count>	
	<max-breakpoint>16</max-breakpoint>	
	<asm-inc>$(DevEnvDir)\asm_inc\$(ChipName).inc</asm-inc>
	<clang-inc>$(DevEnvDir)\include\$(ChipName).h</clang-inc>				
	<description></description>
	<rams>
		<ram start-addr="0" length="512">
			<ram-segment start-addr="00" size="128" write-addr="00" read-addr="00" value-addr="00" visiable="true" bank="0"></ram-segment>
			<ram-segment start-addr="80" size="128" write-addr="80" read-addr="80" value-addr="80" visiable="false" bank="0"></ram-segment>
			<ram-segment start-addr="100" size="256" write-addr="100" read-addr="100" value-addr="100" visiable="true" bank="0"></ram-segment>		
			<ram-segment start-addr="200" size="1" write-addr="8087" read-addr="8087" value-addr="200" visiable="false" bank="0"></ram-segment>	
		</ram>	
	</rams>
	<configs>
		<config-word index="0" or-value="0000" and-value="ffff" mapto="0"></config-word>
		<config-word index="1" or-value="0000" and-value="ffff" mapto="1"></config-word>	
		
		<config-item name="噪声抑制" width="1" offset="0" default-value="1" enable="true" config-index="0">
			<config-item-value name="Disable" value="0"></config-item-value>
			<config-item-value name="Enable" value="1"></config-item-value>
			<description>噪声抑制</description>
		</config-item>				
		<config-item name="加密" width="1" offset="1" default-value="0" enable="true" config-index="0">
			<config-item-value name="Disable" value="0"></config-item-value>
			<config-item-value name="Enable" value="1"></config-item-value>
			<description>芯片数据保护功能，加密后数据无法读出来</description>
		</config-item>	
		<config-item name="时钟分频" width="3" offset="2" default-value="3" enable="true" config-index="0">
			<config-item-value name="Fosc/2" value="0"></config-item-value>
			<config-item-value name="Fosc/4" value="1"></config-item-value>
			<config-item-value name="Fosc/8" value="2"></config-item-value>
			<config-item-value name="Fosc/16" value="3"></config-item-value>
			<config-item-value name="Fosc/32" value="7"></config-item-value>
			<description>CPU时钟分频</description>
		</config-item>
		<config-item name="复位时间" width="2" offset="5" default-value="0" enable="true" config-index="0">
			<config-item-value name="28.8ms" value="0"></config-item-value>
			<config-item-value name="7.2ms" value="1"></config-item-value>
			<config-item-value name="14.4ms" value="2"></config-item-value>
			<config-item-value name="3.6ms" value="3"></config-item-value>
			<description>复位时间选择</description>
		</config-item>			
		<config-item name="看门狗" width="1" offset="7" default-value="1" enable="true" config-index="0">
			<config-item-value name="Disable" value="1"></config-item-value>
			<config-item-value name="Enable" value="0"></config-item-value>
			<description>看门狗使能</description>
		</config-item>	
		<config-item name="LVD" width="1" offset="8" default-value="0" enable="true" config-index="0">
			<config-item-value name="Enable" value="1"></config-item-value>
			<config-item-value name="Disable" value="0"></config-item-value>
			<description>此位有效时，当电压低于1.85V时，系统会复位</description>
		</config-item>
		<config-item name="低功耗" width="1" offset="0" default-value="0" enable="true" config-index="1">
			<config-item-value name="Disable" value="0"></config-item-value>
			<config-item-value name="Enable" value="1"></config-item-value>
			<description>
			在低频时使用，有效时可以大幅降低功耗
			</description>
		</config-item>			
		<config-item name="OTP读指令周期" width="2" offset="1" default-value="0" enable="true" config-index="1">
			<config-item-value name="全指令周期" value="0"></config-item-value>
			<config-item-value name="半指令周期" value="2"></config-item-value>
			<config-item-value name="1/4指令周期" value="3"></config-item-value>
			<description>
			1/4指令周期:在单指令芯片中不适用，如果选中，则还是半指令周期
			</description>
		</config-item>		
	</configs>
	
	
	<sfrs>
		<sfr>
			<reg name="A" addr="200" read-addr="8087" write-addr="8087" value-addr="200" addr-visiable="false" bank="-1"></reg>

			<reg name="L" addr="80" read-addr="80" write-addr="80" value-addr="80" addr-visiable="false" bank="0"></reg>
			<reg name="H" addr="81" read-addr="81" write-addr="81" value-addr="81" addr-visiable="false" bank="0"></reg>
			<reg name="R" addr="82" read-addr="82" write-addr="82" value-addr="82" addr-visiable="false" bank="0"></reg>
			<reg name="Z" addr="83" read-addr="83" write-addr="83" value-addr="83" addr-visiable="false" bank="0"></reg>
			<reg name="Y" addr="84" read-addr="84" write-addr="84" value-addr="84" addr-visiable="false" bank="0"></reg>
			<reg name="X" addr="85" read-addr="85" write-addr="85" value-addr="85" addr-visiable="false" bank="0"></reg>
		
			<reg name="PFLAG" addr="86"  read-addr="86" write-addr="86" value-addr="86" addr-visiable="false" bank="0">
				<bit name="Z" offset="0"></bit>
				<bit name="DC" offset="1"></bit>
				<bit name="C" offset="2"></bit>
				<bit name="--" offset="3"></bit>
				<bit name="--" offset="4"></bit>
				<bit name="--" offset="5"></bit>
				<bit name="PD" offset="6"></bit>
				<bit name="TO" offset="7"></bit>
			</reg>

			<reg name="RBANK" addr="87"  read-addr="87" write-addr="87" value-addr="87" addr-visiable="true" bank="0">
				<bit name="RBANKS0" offset="0"></bit>
				<bit name="RBANKS1" offset="1"></bit>
				<bit name="--" offset="2"></bit>
				<bit name="--" offset="3"></bit>
				<bit name="--" offset="4"></bit>
				<bit name="--" offset="5"></bit>
				<bit name="--" offset="6"></bit>
				<bit name="--" offset="7"></bit>
			</reg>

			<reg name="W0" addr="88" read-addr="88" write-addr="88" value-addr="88" addr-visiable="true" bank="0"></reg>
			<reg name="W1" addr="89" read-addr="89" write-addr="89" value-addr="89" addr-visiable="true" bank="0"></reg>
			<reg name="W2" addr="8a" read-addr="8a" write-addr="8a" value-addr="8a" addr-visiable="true" bank="0"></reg>
			<reg name="W3" addr="8b" read-addr="8b" write-addr="8b" value-addr="8b" addr-visiable="true" bank="0"></reg>
			<reg name="W4" addr="8c" read-addr="8c" write-addr="8c" value-addr="8c" addr-visiable="true" bank="0"></reg>
			<reg name="W5" addr="8d" read-addr="8d" write-addr="8d" value-addr="8d" addr-visiable="true" bank="0"></reg>
			<reg name="W6" addr="8e" read-addr="8e" write-addr="8e" value-addr="8e" addr-visiable="true" bank="0"></reg>
			<reg name="W7" addr="8f" read-addr="8f" write-addr="8f" value-addr="8f" addr-visiable="true" bank="0"></reg>

			<reg name="@HL" addr="90" read-addr="90" write-addr="90" value-addr="90" addr-visiable="true" bank="0"></reg>
			<reg name="@YZ" addr="91" read-addr="91" write-addr="91" value-addr="91" addr-visiable="true" bank="0"></reg>

			<reg name="P_CTRL" addr="92"  read-addr="92" write-addr="92" value-addr="92" addr-visiable="true" bank="0">
				<bit name="P0_CTRL" offset="0"></bit>
				<bit name="P1_CTRL" offset="1"></bit>
				<bit name="P2_CTRL" offset="2"></bit>
				<bit name="--" offset="3"></bit>
				<bit name="--" offset="4"></bit>
				<bit name="LVD_SEL0" offset="5"></bit>
				<bit name="LVD_SEL1" offset="6"></bit>
				<bit name="--" offset="7"></bit>
			</reg>

			<reg name="PCL" addr="93" read-addr="93" write-addr="93" value-addr="93" addr-visiable="true" bank="0"></reg>
			<reg name="PCH" addr="94" read-addr="94" write-addr="94" value-addr="94" addr-visiable="true" bank="0"></reg>

			<reg name="OSCM" addr="95" read-addr="95" write-addr="95" value-addr="95" addr-visiable="true" bank="0">
				<bit name="--" offset="0"></bit>
				<bit name="STPHX" offset="1"></bit>
				<bit name="CLKMD" offset="2"></bit>
				<bit name="CPUM0" offset="3"></bit>
				<bit name="CPUM1" offset="4"></bit>
				<bit name="--" offset="5"></bit>
				<bit name="--" offset="6"></bit>
				<bit name="--" offset="7"></bit>
			</reg>

			<reg name="WDTR" addr="96" read-addr="96" write-addr="96" value-addr="96" addr-visiable="true" bank="0"></reg>

			<reg name="INTRQ" addr="97" read-addr="97" write-addr="97" value-addr="97" addr-visiable="true" bank="0">
				<bit name="INT0IF" offset="0"></bit>
				<bit name="P50IF" offset="1"></bit>
				<bit name="P54IF" offset="2"></bit>
				<bit name="P0P1IF" offset="3"></bit>
				<bit name="T1IF" offset="4"></bit>
				<bit name="TC0IF" offset="5"></bit>
				<bit name="--" offset="6"></bit>
				<bit name="--" offset="7"></bit>
			</reg>

			<reg name="INTEN" addr="99" read-addr="99" write-addr="99" value-addr="99" addr-visiable="true" bank="0">
				<bit name="INT0IE" offset="0"></bit>
				<bit name="P50IE" offset="1"></bit>
				<bit name="P54IE" offset="2"></bit>
				<bit name="P0P1IE" offset="3"></bit>
				<bit name="T1IE" offset="4"></bit>
				<bit name="TC0IE" offset="5"></bit>
				<bit name="--" offset="6"></bit>
				<bit name="--" offset="7"></bit>
			</reg>

			<reg name="REM" addr="9A" read-addr="9A" write-addr="9A" value-addr="9A" addr-visiable="true" bank="0">
				<bit name="DRV_S0" offset="0"></bit>
				<bit name="DRV_S1" offset="1"></bit>
				<bit name="DRV_S2" offset="2"></bit>
				<bit name="ELE_EN" offset="3"></bit>
				<bit name="--" offset="4"></bit>
				<bit name="--" offset="5"></bit>
				<bit name="--" offset="6"></bit>
				<bit name="--" offset="7"></bit>
			</reg>

			<reg name="P0W" addr="9B" read-addr="9B" write-addr="9B" value-addr="9B" addr-visiable="true" bank="0"></reg>
			<reg name="P1W" addr="9C" read-addr="9C" write-addr="9C" value-addr="9C" addr-visiable="true" bank="0"></reg>

			<reg name="PEDGE" addr="9D" read-addr="9D" write-addr="9D" value-addr="9D" addr-visiable="true" bank="0">
				<bit name="P15G0" offset="0"></bit>
				<bit name="P15G1" offset="1"></bit>
				<bit name="--" offset="2"></bit>
				<bit name="INTS" offset="3"></bit>
				<bit name="--" offset="4"></bit>
				<bit name="IRXO" offset="5"></bit>
				<bit name="IRXEN" offset="6"></bit>
				<bit name="--" offset="7"></bit>
			</reg>

			<reg name="P0M0" addr="A0" read-addr="A0" write-addr="A0" value-addr="A0" addr-visiable="true" bank="0"></reg>
			<reg name="P1M0" addr="A1" read-addr="A1" write-addr="A1" value-addr="A1" addr-visiable="true" bank="0"></reg>
			<reg name="P5M0" addr="A4" read-addr="A4" write-addr="A4" value-addr="A4" addr-visiable="true" bank="0"></reg>

			<reg name="P0" addr="A5" read-addr="A5" write-addr="A5" value-addr="A5" addr-visiable="true" bank="0"></reg>
			<reg name="P1" addr="A6" read-addr="A6" write-addr="A6" value-addr="A6" addr-visiable="true" bank="0"></reg>
			<reg name="P5" addr="A9" read-addr="A9" write-addr="A9" value-addr="A9" addr-visiable="true" bank="0"></reg>

			<reg name="P0M1" addr="AA" read-addr="AA" write-addr="AA" value-addr="AA" addr-visiable="true" bank="0"></reg>
			<reg name="P1M1" addr="AB" read-addr="AB" write-addr="AB" value-addr="AB" addr-visiable="true" bank="0"></reg>
			<reg name="P5M1" addr="AE" read-addr="AE" write-addr="AE" value-addr="AE" addr-visiable="true" bank="0"></reg>

			<reg name="T1M" addr="B5" read-addr="B5" write-addr="B5" value-addr="B5" addr-visiable="true" bank="0">
				<bit name="TC0GN" offset="0"></bit>
				<bit name="T1GATE" offset="1"></bit>
				<bit name="T1CK" offset="2"></bit>
				<bit name="TP1SEL" offset="3"></bit>
				<bit name="TP1S0" offset="4"></bit>
				<bit name="TP1S1" offset="5"></bit>
				<bit name="TP1S2" offset="6"></bit>
				<bit name="TR1" offset="7"></bit>
			</reg>

			<reg name="T1CL" addr="B6" read-addr="B6" write-addr="B6" value-addr="B6" addr-visiable="true" bank="0"></reg>
			<reg name="T1CH" addr="B7" read-addr="B7" write-addr="B7" value-addr="B7" addr-visiable="true" bank="0"></reg>

			<reg name="TC0M" addr="B8" read-addr="B8" write-addr="B8" value-addr="B8" addr-visiable="true" bank="0">
				<bit name="PWMOUT" offset="0"></bit>
				<bit name="BUZOUT" offset="1"></bit>
				<bit name="TC0I0" offset="2"></bit>
				<bit name="TC0I1" offset="3"></bit>
				<bit name="TC0S0" offset="4"></bit>
				<bit name="TC0S1" offset="5"></bit>
				<bit name="TC0S2" offset="6"></bit>
				<bit name="TC0TR" offset="7"></bit>
			</reg>

			<reg name="TC0C" addr="B9" read-addr="B9" write-addr="B9" value-addr="B9" addr-visiable="true" bank="0"></reg>
			<reg name="TC0R" addr="BA" read-addr="BA" write-addr="BA" value-addr="BA" addr-visiable="true" bank="0"></reg>
			<reg name="TC0D" addr="BB" read-addr="BB" write-addr="BB" value-addr="BB" addr-visiable="true" bank="0"></reg>

			<reg name="OPTION" addr="CC" read-addr="CC" write-addr="CC" value-addr="CC" addr-visiable="true" bank="0">
				<bit name="P0_SCAN_W" offset="0"></bit>
				<bit name="P1_SCAN_W" offset="1"></bit>
				<bit name="P2_SCAN_W" offset="2"></bit>
				<bit name="IE_SEL" offset="3"></bit>
				<bit name="WDT_PRE0" offset="4"></bit>
				<bit name="WDT_PRE1" offset="5"></bit>
				<bit name="WDT_PRE2" offset="6"></bit>
				<bit name="WDT_EN" offset="7"></bit>
			</reg>

			<reg name="REV0_T0L" addr="EA" read-addr="EA" write-addr="EA" value-addr="EA" addr-visiable="true" bank="0"></reg>
			<reg name="REV0_T0H" addr="EB" read-addr="EB" write-addr="EB" value-addr="EB" addr-visiable="true" bank="0"></reg>
			<reg name="REV1_T0L" addr="EC" read-addr="EC" write-addr="EC" value-addr="EC" addr-visiable="true" bank="0"></reg>
			<reg name="REV1_T0H" addr="ED" read-addr="ED" write-addr="ED" value-addr="ED" addr-visiable="true" bank="0"></reg>

			<reg name="STKP" addr="EF" read-addr="EF" write-addr="EF" value-addr="EF" addr-visiable="true" bank="0">
				<bit name="STKPB0" offset="0"></bit>
				<bit name="STKPB1" offset="1"></bit>
				<bit name="STKPB2" offset="2"></bit>
				<bit name="--" offset="3"></bit>
				<bit name="LVD1DB" offset="4"></bit>
				<bit name="LVD2X" offset="5"></bit>
				<bit name="--" offset="6"></bit>
				<bit name="GIE" offset="7"></bit>
			</reg>

			<reg name="STK7L" addr="F0" read-addr="F0" write-addr="F0" value-addr="F0" addr-visiable="true" bank="0"></reg>
			<reg name="STK7H" addr="F1" read-addr="F1" write-addr="F1" value-addr="F1" addr-visiable="true" bank="0"></reg>
			<reg name="STK6L" addr="F2" read-addr="F2" write-addr="F2" value-addr="F2" addr-visiable="true" bank="0"></reg>
			<reg name="STK6H" addr="F3" read-addr="F3" write-addr="F3" value-addr="F3" addr-visiable="true" bank="0"></reg>
			<reg name="STK5L" addr="F4" read-addr="F4" write-addr="F4" value-addr="F4" addr-visiable="true" bank="0"></reg>
			<reg name="STK5H" addr="F5" read-addr="F5" write-addr="F5" value-addr="F5" addr-visiable="true" bank="0"></reg>
			<reg name="STK4L" addr="F6" read-addr="F6" write-addr="F6" value-addr="F6" addr-visiable="true" bank="0"></reg>
			<reg name="STK4H" addr="F7" read-addr="F7" write-addr="F7" value-addr="F7" addr-visiable="true" bank="0"></reg>
			<reg name="STK3L" addr="F8" read-addr="F8" write-addr="F8" value-addr="F8" addr-visiable="true" bank="0"></reg>
			<reg name="STK3H" addr="F9" read-addr="F9" write-addr="F9" value-addr="F9" addr-visiable="true" bank="0"></reg>
			<reg name="STK2L" addr="FA" read-addr="FA" write-addr="FA" value-addr="FA" addr-visiable="true" bank="0"></reg>
			<reg name="STK2H" addr="FB" read-addr="FB" write-addr="FB" value-addr="FB" addr-visiable="true" bank="0"></reg>
			<reg name="STK1L" addr="FC" read-addr="FC" write-addr="FC" value-addr="FC" addr-visiable="true" bank="0"></reg>
			<reg name="STK1H" addr="FD" read-addr="FD" write-addr="FD" value-addr="FD" addr-visiable="true" bank="0"></reg>
			<reg name="STK0L" addr="FE" read-addr="FE" write-addr="FE" value-addr="FE" addr-visiable="true" bank="0"></reg>
			<reg name="STK0H" addr="FF" read-addr="FF" write-addr="FF" value-addr="FF" addr-visiable="true" bank="0"></reg>

		</sfr>	
	</sfrs>
	<insts>
		<inst name="call" value="c000" mask-value="c000"/>
		<inst name="return" value="0e00" mask-value="ffff"/>
		<inst name="return" value="0f00" mask-value="ffff"/>
	</insts>
	<compilers>
		<compiler>	
			<compiler-item type="c" name="cc2" command-path="$(DevEnvDir)\cc2.exe">
				<option>-chip-name $(ChipName) -chip-ver $(ChipVer) -chip-id $(ChipID) -file-ver $(CCSFileVer) -rom-size $(UserRomSize) -debug false -c h1 -clean-ram false -prj-name "$(ProjectName)" -work-dir "$(ProjectDir)" -output-dir "$(OutDir)" -config "$(ConfigWord)" -lib "$GetFiles('.lib',';')"  -inc-dir "$GetFolders(';')" -src-files "$GetFiles('.c',';')" -inc-files "$GetFiles('.h;.inc',';')"</option>
				<action-before-compile>
				</action-before-compile> 
				<action-after-compile >
					<action-item  name="ccs_e" command-path="$(DevEnvDir)\ccs_e.exe">"$(ProjectDir)\$(ProjectName).ccs" -E</action-item>
				</action-after-compile>
			</compiler-item>
			<compiler-item type="asm" name="ac0" command-path="$(DevEnvDir)\ac0.exe">
				<option>-chip $(ChipName) -rom-size $(UserRomSize) -ram-start $(RamStartAddr) -ram-size $(RamSize) -reset-addr $(ResetAddr) -inst-set INST_SET_8F22E8 -otp-body-size $(OtpBodySize) -debug false -symbol-file true  -listfile true -workdir "$(ProjectDir)" -include-path "$GetFolders(';')" -file "$(EntryFile)" -output "$(OutDir)" -project-name "$(ProjectName)" -config "$(ConfigWord)"</option>
				<action-before-compile>
				</action-before-compile>
				<action-after-compile>
					<action-item  name="ccs_e" command-path="$(DevEnvDir)\ccs_e.exe">"$(ProjectDir)\$(ProjectName).ccs" -E</action-item>
				</action-after-compile>
			</compiler-item>
			<compiler-item type="c" name="cc2" out-type="lib" command-path="$(DevEnvDir)\cc2.exe">
				<option>-chip-name $(ChipName) -chip-ver $(ChipVer) -chip-id $(ChipID) -file-ver $(CCSFileVer) -rom-size $(UserRomSize) -debug false  -c h1 -clean-ram false -prj-name "$(ProjectName)"  -out-type $(ProjectType) -work-dir "$(ProjectDir)" -output-dir "$(OutDir)" -config "$(ConfigWord)" -lib "$GetFiles('.lib',';')"  -inc-dir "$GetFolders(';')" -src-files "$GetFiles('.c',';')" -inc-files "$GetFiles('.h;.inc',';')"</option>
			</compiler-item>			
		</compiler>	
	</compilers>
	<debugers>
		<debuger>
			<debuger-asm>ac0</debuger-asm>
			<debuger-c>snc</debuger-c>		
			<device type="1" version="0">
				<simulator type="1" version="0" code-first="true" config-item="true" config-item-id="4">
					<pc-addr pcl="93" pch="94" />
					<config-word-addr>FF8</config-word-addr>
				</simulator>
			</device>
			<action-before-debug-start></action-before-debug-start>
			<action-after-debug-start></action-after-debug-start>
		</debuger>		
	</debugers>
	<editor-language>
		<c-lang name="c2-lang"/>
		<asm-lang name="asm3-lang"/>
	</editor-language>	
</chip>