
;------------------------------------------------------------------------------
;  CHIP: SN8P2758, OTP Only
;  Revision History:
;  V1  08/21/2008  1. First issue, emulate SN8P2758 in S8KD-2 ICE
;  		   2. Remove IHRC_Detect code option
;  V2  05/15/2009  1. Modify  .Assembly	OPTION	14	Fix_low (Disable IHRC_Deect function)
;  V3  06/29/2010  1. "SLowMode"-->"SlowMode" macro name. 
;		   2. Add "RedWrt_FORMAT    1"  
;  V4  07/26/2010  1. Modify macro "FSTPHX"
;  V5  08/10/2010  1. Remove FP33 EQU P3.3
;  V6  05/10/2011  1. Remove Reset_Pin code option.	 		 
;------------------------------------------------------------------------------
.Assembly	INC_VER		6
.ASSEMBLY	RedWrt_FORMAT   1
.Assembly	ASM_FORMAT	1
.Assembly	RAM_Size	256

.Assembly	INSTRUMENT	SN8P2758
.Assembly	BIT_FILE	SN8P2758

.Assembly	OTP_BODY_SIZE	0x1000
.Assembly	USER_ROM_SIZE	0x0FFC
.Assembly	COMMAND		Enable_ORG4_7
.Assembly	PGM_TYPE	6
.Assembly	MASK_TEST_CODE	0x0000, 0x0000, 0x0000, 0x0000
.Assembly	Port_Pins	3, 8, 8, 4, 8, 8
.Assembly	CHIP_ID		0x6720

; Code Option 0xFFF
.Assembly	OPTION				0		Noise_Filter	Disable Enable
.Assembly	OPTION				1		Security			Enable	Disable
.Assembly	OPTION				2		Fcpu					Fosc/1 Fosc/2 Fosc/4 Fosc/8 Fosc/16 Fosc/32 Fosc/64 Fosc/128
.Assembly	OPTION				5		High_Clk			IHRC_16M IHRC_RTC x x Ext_RC 32K_X'tal 12M_X'tal 4M_X'tal
.Assembly	OPTION			8		Watch_Dog 			x x x x x Enable x x x x Disable x x x x Always_On 
.Assembly	OPTION			12	Fix_High
.Assembly	OPTION			13	Ext_Reset_Length   No 128*ILRC
.Assembly	OPTION			14	Fix_Low
.Assembly	OPTION			15	Fix_High

; Code Option 0xFFE
.Assembly	OPTION			16		Fix_Low
.Assembly	OPTION			17		Fix_High
.Assembly	OPTION			18		Fix_Low
.Assembly	OPTION			19		Fix_High
.Assembly	OPTION			20		Fix_High
.Assembly	OPTION			21		Fix_Low
.Assembly	OPTION			22		Fix_High
.Assembly	OPTION			23		Fix_Low
.Assembly	OPTION			24		Fix_Low
.Assembly	OPTION			25		Fix_High
.Assembly	OPTION			26		Fix_Low
.Assembly	OPTION			27		Fix_High
.Assembly	OPTION			28 : 31		Fix_High

; Code Option 0xFFD
.Assembly	OPTION		  32 : 47		Fix_High

; Code Option 0xFFC
.Assembly	OPTION		48 : 63		Fix_High

.Assembly	OPTION		2ffh
	L					EQU		0x80
	H					EQU		0x81
	R					EQU		0x82
	Z					EQU		0x83
	Y					EQU		0x84
	X					EQU		0x85

	PFLAG			EQU		0x86
	FZ				EQU		PFLAG.0
	FDC				EQU		PFLAG.1
	FC				EQU		PFLAG.2
	FNPD			EQU		PFLAG.6
	FNT0			EQU		PFLAG.7

	RBANK			EQU		0x87
	FRBNKS0		EQU		RBANK.0

	MSPSTAT	  EQU		090H
	FCKE			EQU		MSPSTAT.6
	FD_A			EQU_R	MSPSTAT.5
	FP				EQU_R	MSPSTAT.4
	FS				EQU_R	MSPSTAT.3
	FRED_WRT	EQU_R	MSPSTAT.2
	FBF				EQU_R	MSPSTAT.0
		
	MSPM1			EQU		091H
	FWCOL			EQU		MSPM1.7
	FMSPOV		EQU		MSPM1.6
	FMSPENB		EQU		MSPM1.5
	FCKP			EQU		MSPM1.4
	FSLRXCKP	EQU		MSPM1.3
	FMSPWK		EQU		MSPM1.2
	FMSPRATE	EQU		MSPM1.1
	FMSPC			EQU		MSPM1.0
		
	MSPM2			EQU		092H
	FGCEN			EQU		MSPM2.7
	FACKSTAT	EQU		MSPM2.6
	FACKDT		EQU		MSPM2.5
	FACKEN		EQU		MSPM2.4
	FRCEN			EQU		MSPM2.3
	FPEN			EQU		MSPM2.2
	FRSEN     EQU   MSPM2.1
	FSEN			EQU		MSPM2.0
		
	MSPBUF		EQU		093H
	FMSPBUF7	EQU		MSPBUF.7
	FMSPBUF6	EQU		MSPBUF.6
	FMSPBUF5	EQU		MSPBUF.5
	FMSPBUF4	EQU		MSPBUF.4
	FMSPBUF3	EQU		MSPBUF.3
	FMSPBUF2	EQU		MSPBUF.2
	FMSPBUF1	EQU		MSPBUF.1
	FMSPBUF0	EQU		MSPBUF.0
		
	MSPADR		EQU		094H
	FMSPADR7	EQU		MSPADR.7
	FMSPADR6	EQU		MSPADR.6
	FMSPADR5	EQU		MSPADR.5
	FMSPADR4	EQU		MSPADR.4
	FMSPADR3	EQU		MSPADR.3
	FMSPADR2	EQU		MSPADR.2
	FMSPADR1	EQU		MSPADR.1
	FMSPADR0	EQU		MSPADR.0

	P4CON			EQU_W	0xAE
	FP4CON7		EQU_W	P4CON.7
	FP4CON6		EQU_W	P4CON.6
	FP4CON5		EQU_W	P4CON.5
	FP4CON4		EQU_W	P4CON.4
	FP4CON3		EQU_W	P4CON.3
	FP4CON2		EQU_W	P4CON.2
	FP4CON1		EQU_W	P4CON.1
	FP4CON0		EQU_W	P4CON.0

	DAM				EQU		0xB0
	FDAENB		EQU		DAM.7
	FDAB6			EQU		DAM.6
	FDAB5			EQU		DAM.5
	FDAB4			EQU		DAM.4
	FDAB3			EQU		DAM.3
	FDAB2			EQU		DAM.2
	FDAB1			EQU		DAM.1
	FDAB0			EQU		DAM.0

	ADM			EQU		0xB1
		FADENB	EQU		ADM.7
		FADS	EQU		ADM.6
		FEOC	EQU		ADM.5
		FGCHS	EQU		ADM.4
		FCHS2	EQU		ADM.2
		FCHS1	EQU		ADM.1
		FCHS0	EQU		ADM.0
		
	ADB			EQU_R	0B2H

	ADR			EQU		0B3H
	
		FADCKS2	EQU		ADR.7
		FADCKS	EQU		ADR.6
		FADCKS1	EQU		ADR.6
		FADLEN	EQU		ADR.5
		FADCKS0	EQU		ADR.4
		FADB3	EQU_R		ADR.3
		FADB2	EQU_R		ADR.2
		FADB1	EQU_R		ADR.1
		FADB0	EQU_R		ADR.0		

		SIOM		EQU		0B4H
		FSENB		EQU		SIOM.7
		FSTART	EQU		SIOM.6
		FSRATE1	EQU		SIOM.5
		FSRATE0	EQU		SIOM.4
		FMLSB		EQU		SIOM.3
		FSCKMD	EQU		SIOM.2
		FCPOL		EQU		SIOM.1
		FCPHA		EQU		SIOM.0

	SIOR			EQU_W		0B5H
	SIOB			EQU		0B6H
	
	P0M			EQU		0B8H
		FP02M	EQU		P0M.2
		FP01M	EQU		P0M.1
		FP00M	EQU		P0M.0
	
	
		PEDGE		EQU		0BFH
		FP02G1	EQU		PEDGE.5
		FP02G0	EQU		PEDGE.4
		FP01G1	EQU		PEDGE.3
		FP01G0	EQU		PEDGE.2
		FP00G1	EQU		PEDGE.1
		FP00G0	EQU		PEDGE.0

	P1W			EQU_W		0C0H
		FP17W	EQU_W		P1W.7
		FP16W	EQU_W		P1W.6
		FP15W	EQU_W		P1W.5
		FP14W	EQU_W		P1W.4
		FP13W	EQU_W		P1W.3
		FP12W	EQU_W		P1W.2
		FP11W	EQU_W		P1W.1
		FP10W	EQU_W		P1W.0

	P1M			EQU		0C1H
		FP17M	EQU		P1M.7
		FP16M	EQU		P1M.6
		FP15M	EQU		P1M.5
		FP14M	EQU		P1M.4
		FP13M	EQU		P1M.3
		FP12M	EQU		P1M.2
		FP11M	EQU		P1M.1
		FP10M	EQU		P1M.0

	P2M			EQU		0C2H
		FP27M	EQU		P2M.7
		FP26M	EQU		P2M.6
		FP25M	EQU		P2M.5
		FP24M	EQU		P2M.4
		FP23M	EQU		P2M.3
		FP22M	EQU		P2M.2
		FP21M	EQU		P2M.1
		FP20M	EQU		P2M.0
		
	P3M		EQU			0C3H
		FP32M	EQU		P3M.2	
		FP31M	EQU		P3M.1	
		FP30M	EQU		P3M.0		

	P4M			EQU		0C4H
		FP47M	EQU		P4M.7
		FP46M	EQU		P4M.6
		FP45M	EQU		P4M.5
		FP44M	EQU		P4M.4
		FP43M	EQU		P4M.3
		FP42M	EQU		P4M.2
		FP41M	EQU		P4M.1
		FP40M	EQU		P4M.0

	P5M			EQU		0C5H
		FP57M	EQU		P5M.7
		FP56M	EQU		P5M.6
		FP55M	EQU		P5M.5
		FP54M	EQU		P5M.4
		FP53M	EQU		P5M.3
		FP52M	EQU		P5M.2
		FP51M	EQU		P5M.1
		FP50M	EQU		P5M.0		

	INTRQ_1	EQU		0C6H
		FMSPIRQ	EQU		INTRQ_1.0

	INTEN_1	EQU		0C7H
		FMSPIEN	EQU		INTEN_1.0

	INTRQ			EQU		0C8H
		FADCIRQ	EQU		INTRQ.7
		FTC1IRQ	EQU		INTRQ.6
		FTC0IRQ	EQU		INTRQ.5
		FT0IRQ	EQU		INTRQ.4
		FSIOIRQ	EQU		INTRQ.3
		FP02IRQ	EQU		INTRQ.2
		FP01IRQ	EQU		INTRQ.1
		FP00IRQ	EQU		INTRQ.0

	INTEN			EQU		0C9H
		FADCIEN	EQU		INTEN.7
		FTC1IEN	EQU		INTEN.6
		FTC0IEN	EQU		INTEN.5
		FT0IEN	EQU		INTEN.4
		FSIOIEN	EQU		INTEN.3
		FP02IEN	EQU		INTEN.2
		FP01IEN	EQU		INTEN.1
		FP00IEN	EQU		INTEN.0

	OSCM			EQU		0CAH		
		FCPUM1	EQU	OSCM.4
		FCPUM0	EQU	OSCM.3
		FCLKMD	EQU	OSCM.2
		FSTPHX	EQU	OSCM.1
		
	WDTR		EQU_W		0CCH				

	TC0R			EQU_W		0CDH

	PCL			EQU		0CEH
	PCH			EQU		0CFH

	P0			EQU		0D0H
		FP02	EQU		P0.2
		FP01	EQU		P0.1
		FP00	EQU		P0.0	

	P1			EQU		0D1H
		FP17	EQU		P1.7
		FP16	EQU		P1.6
		FP15	EQU		P1.5
		FP14	EQU		P1.4
		FP13	EQU		P1.3
		FP12	EQU		P1.2
		FP11	EQU		P1.1
		FP10	EQU		P1.0

	P2			EQU		0D2H
		FP27	EQU		P2.7
		FP26	EQU		P2.6
		FP25	EQU		P2.5
		FP24	EQU		P2.4
		FP23	EQU		P2.3
		FP22	EQU		P2.2
		FP21	EQU		P2.1
		FP20	EQU		P2.0
		
	P3		EQU			0D3H
		FP32	EQU		P3.2	
		FP31	EQU		P3.1	
		FP30	EQU		P3.0

	P4			EQU		0D4H
		FP47	EQU		P4.7
		FP46	EQU		P4.6
		FP45	EQU		P4.5
		FP44	EQU		P4.4
		FP43	EQU		P4.3
		FP42	EQU		P4.2
		FP41	EQU		P4.1
		FP40	EQU		P4.0

	P5			EQU		0D5H
		FP57	EQU		P5.7
		FP56	EQU		P5.6
		FP55	EQU		P5.5
		FP54	EQU		P5.4
		FP53	EQU		P5.3
		FP52	EQU		P5.2
		FP51	EQU		P5.1
		FP50	EQU		P5.0		

	T0M			EQU		0D8H
		FT0ENB		EQU	T0M.7
		FT0RATE2	EQU	T0M.6
		FT0RATE1	EQU	T0M.5
		FT0RATE0	EQU	T0M.4
		FTC1X8		EQU	T0M.3
		FTC0X8		EQU	T0M.2
		FT0TB			EQU	T0M.0

	T0C			EQU	0D9H

	TC0M			EQU		0DAH
		FTC0ENB		EQU	TC0M.7
		FTC0RATE2	EQU	TC0M.6
		FTC0RATE1	EQU	TC0M.5
		FTC0RATE0	EQU	TC0M.4
		FTC0CKS		EQU	TC0M.3
		FALOAD0		EQU	TC0M.2
		FTC0OUT		EQU	TC0M.1
		FPWM0OUT	EQU	TC0M.0

	TC0C			EQU		0DBH

	TC1M			EQU		0DCH
		FTC1ENB		EQU	TC1M.7
		FTC1RATE2	EQU	TC1M.6
		FTC1RATE1	EQU	TC1M.5
		FTC1RATE0	EQU	TC1M.4
		FTC1CKS		EQU	TC1M.3
		FALOAD1		EQU	TC1M.2
		FTC1OUT		EQU	TC1M.1
		FPWM1OUT	EQU	TC1M.0

	TC1C			EQU		0DDH
	TC1R			EQU_W		0DEH

	STKP		EQU		0DFH
		FGIE	EQU		STKP.7
		FSTKPB2	EQU		STKP.2
		FSTKPB1	EQU		STKP.1
		FSTKPB0	EQU		STKP.0

	P0UR			EQU_W		0E0H
		FP02R	EQU_W		P0UR.2
		FP01R	EQU_W		P0UR.1
		FP00R	EQU_W		P0UR.0

	P1UR			EQU_W		0E1H
		FP17R	EQU_W		P1UR.7
		FP16R	EQU_W		P1UR.6
		FP15R	EQU_W		P1UR.5
		FP14R	EQU_W		P1UR.4
		FP13R	EQU_W		P1UR.3
		FP12R	EQU_W		P1UR.2
		FP11R	EQU_W		P1UR.1
		FP10R	EQU_W		P1UR.0

	P2UR			EQU_W		0E2H
		FP27R	EQU_W		P2UR.7
		FP26R	EQU_W		P2UR.6
		FP25R	EQU_W		P2UR.5
		FP24R	EQU_W		P2UR.4
		FP23R	EQU_W		P2UR.3
		FP22R	EQU_W		P2UR.2
		FP21R	EQU_W		P2UR.1
		FP20R	EQU_W		P2UR.0
		
	P3UR			EQU_W		0E3H
		FP32R	EQU_W		P3UR.2	
		FP31R	EQU_W		P3UR.1	
		FP30R	EQU_W		P3UR.0

	P4UR			EQU_W		0E4H
		FP47R	EQU_W		P4UR.7
		FP46R	EQU_W		P4UR.6
		FP45R	EQU_W		P4UR.5
		FP44R	EQU_W		P4UR.4
		FP43R	EQU_W		P4UR.3
		FP42R	EQU_W		P4UR.2
		FP41R	EQU_W		P4UR.1
		FP40R	EQU_W		P4UR.0

	P5UR			EQU_W		0E5H
		FP57R	EQU_W		P5UR.7
		FP56R	EQU_W		P5UR.6
		FP55R	EQU_W		P5UR.5
		FP54R	EQU_W		P5UR.4
		FP53R	EQU_W		P5UR.3
		FP52R	EQU_W		P5UR.2
		FP51R	EQU_W		P5UR.1
		FP50R	EQU_W		P5UR.0

	@HL			EQU		0E6H
	@YZ			EQU		0E7H

	
	P1OC    EQU_W     	0E9H
	FP10OC  EQU_W     	P1OC.0
  FP11OC  EQU_W     	P1OC.1
  FP52OC  EQU_W     	P1OC.2

	STK7L		EQU		0F0h
	STK7H		EQU		0F1h
	STK6L		EQU		0F2h
	STK6H		EQU		0F3h
	STK5L		EQU		0F4h
	STK5H		EQU		0F5h
	STK4L		EQU		0F6h
	STK4H		EQU		0F7h
	STK3L		EQU		0F8h
	STK3H		EQU		0F9h
	STK2L		EQU		0FAh
	STK2H		EQU		0FBh
	STK1L		EQU		0FCh
	STK1H		EQU		0FDh
	STK0L		EQU		0FEh
	STK0H		EQU		0FFh

; -----------------------------------------------------
; Clear watchdog macro for compatibility in S8KD-2 ICE
;  
; Total Cycle: 2 

	@RST_WDT	macro		
 		   MOV  A, #0x5A
		   B0MOV  WDTR, A
	endm
	
; -----------------------------------------------------
; Sleep Mode control macro for compatibility in S8KD-2 ICE
;  
; Total Cycle: 1

	SleepMode	macro	
		B0BSET	FCPUM0
	endm
; -----------------------------------------------------
; Green Mode control macro for compatibility in S8KD-2 ICE
;  
; Total Cycle: 3

	GreenMode	macro	
		B0BSET	FCPUM1
		NOP
		NOP
	endm
; -----------------------------------------------------
; Slow Mode control macro for compatibility in S8KD-2 ICE
;  
; Total Cycle: 2

	SlowMode	macro	
		B0BSET	FCLKMD
		B0BSET	FSTPHX
	endm
; -----------------------------------------------------
;  Slow mode to Normal Mode control macro for compatibility in S8KD-2 ICE
;  
; Total Cycle: 5

	Slow2Normal	macro	
		B0BCLR	FSTPHX
		NOP
		NOP
		NOP
		B0BCLR	FCLKMD
	endm
; -----------------------------------------------------	
.TEXT
{
	//{{SONIX_OPTION_RULE		
	
	IF Noise_Filter == Enable
	{

	   OPTION    2 Fcpu	X X Fosc/4 Fosc/8 Fosc/16 Fosc/32 Fosc/64 Fosc/128
	}
	
	IF Noise_Filter == Disable
	{

	   OPTION     2	Fcpu	Fosc/1 Fosc/2 Fosc/4 Fosc/8 Fosc/16 Fosc/32 Fosc/64 Fosc/128
 	}   
	ENDP
	//}}SONIX_OPTION_RULE
}
