<?xml version="1.0" encoding="UTF-8"?>
<chip>
	<configure-file-ver>1.0</configure-file-ver>
	<chip-name>HS23P1820</chip-name>
	<chip-classes>GPIO</chip-classes>
	<chip-id>B3</chip-id>
	<chip-id-debug>fe38</chip-id-debug>
	<chip-ver>0</chip-ver>
	<ccs-file-ver>4</ccs-file-ver>
	<ram-start-addr>0</ram-start-addr>
	<ram-size>256</ram-size>
	<otp-body-size>1024</otp-body-size>
	<user-rom-size>1024</user-rom-size>
	<reset-addr>3ff</reset-addr>
	<stack-level>5</stack-level>
	<config-word-count>5</config-word-count>
	<max-breakpoint>16</max-breakpoint>	
	<asm-inc>$(DevEnvDir)\asm_inc\$(ChipName).inc</asm-inc>
	<clang-inc>$(DevEnvDir)\include\$(ChipName).h</clang-inc>		
	<description></description>
	<rams>
		<ram mode="ic"  start-addr="0" length="512">
			<ram-segment start-addr="00" size="32" write-addr="00" read-addr="00" value-addr="00" visiable="false" bank="0"></ram-segment>
			<ram-segment start-addr="40" size="64" write-addr="40" read-addr="40" value-addr="40" visiable="true" bank="0"></ram-segment>
			<ram-segment start-addr="80" size="32" write-addr="0100" read-addr="0100" value-addr="80" visiable="false" bank="1"></ram-segment>
			<ram-segment start-addr="f0" size="16" write-addr="01f0" read-addr="01f0" value-addr="f0" visiable="true" bank="1"></ram-segment>	
			<ram-segment start-addr="100" size="32" write-addr="0200" read-addr="0200" value-addr="100" visiable="false" bank="2"></ram-segment>	
			<ram-segment start-addr="170" size="16" write-addr="0270" read-addr="0270" value-addr="170" visiable="true" bank="2"></ram-segment>
			<ram-segment start-addr="180" size="32" write-addr="0380" read-addr="0380" value-addr="180" visiable="false" bank="3"></ram-segment>		
			<ram-segment start-addr="1f0" size="16" write-addr="3f0" read-addr="3f0" value-addr="1f0" visiable="true" bank="3"></ram-segment>	
			<ram-segment start-addr="ff0" size="7" write-addr="ff0" read-addr="ff0" value-addr="ff0" visiable="false" bank="-1"></ram-segment>	
		</ram>	
		<ram mode="fpga" start-addr="0" length="512">
			<ram-segment start-addr="00" size="32" write-addr="00" read-addr="00" value-addr="00" visiable="false" bank="0"></ram-segment>
			<ram-segment start-addr="20" size="80" write-addr="20" read-addr="20" value-addr="20" visiable="true" bank="0"></ram-segment>
			<ram-segment start-addr="70" size="16" write-addr="70" read-addr="70" value-addr="70" visiable="true" bank="0"></ram-segment>
			<ram-segment start-addr="80" size="32" write-addr="8000" read-addr="8000" value-addr="80" visiable="false" bank="1"></ram-segment>
			<ram-segment start-addr="a0" size="32" write-addr="a0" read-addr="a0" value-addr="a0" visiable="true" bank="1"></ram-segment>	
			<ram-segment start-addr="f0" size="16" write-addr="f0" read-addr="f0" value-addr="f0" visiable="true" bank="1"></ram-segment>	
			<ram-segment start-addr="100" size="32" write-addr="4000" read-addr="4000" value-addr="100" visiable="false" bank="2"></ram-segment>	
			<ram-segment start-addr="170" size="16" write-addr="170" read-addr="170" value-addr="170" visiable="true" bank="2"></ram-segment>
			<ram-segment start-addr="180" size="32" write-addr="c000" read-addr="c000" value-addr="180" visiable="false" bank="3"></ram-segment>		
			<ram-segment start-addr="1f0" size="16" write-addr="1f0" read-addr="1f0" value-addr="1f0" visiable="true" bank="-1"></ram-segment>				
		</ram>		
	</rams>
	<configs>
		<config-word index="0" or-value="0000" and-value="ffff" mapto="0"></config-word>
		<config-word index="1" or-value="2080" and-value="ffff" mapto="1"></config-word>	
		<config-word index="2" or-value="2000" and-value="ffff" mapto="3"></config-word>	
		<config-word index="3" or-value="0002" and-value="ffff" mapto="2"></config-word>	
		
		<config-item name="PB3引脚功能选择" width="1" offset="12" default-value="1" enable="true" config-index="0">
			<config-item-value name="As RESET Pin" value="0"></config-item-value>
			<config-item-value name="As IO" value="1"></config-item-value>
			<description>PB3引脚功能选择</description>
		</config-item>
		<config-item name="PB4功能选择" width="1" offset="11" default-value="0" enable="true" config-index="0">
			<config-item-value name="As IO" value="0"></config-item-value>
			<config-item-value name="As OSCO" value="1"></config-item-value>
			<description>PB4功能选择</description>
		</config-item>		
		<config-item name="复位时间" width="3" offset="8" default-value="3" enable="true" config-index="0">
			<config-item-value name="PWRT=WDT=18ms" value="0"></config-item-value>
			<config-item-value name="PWRT=WDT=4.5ms" value="1"></config-item-value>
			<config-item-value name="PWRT=WDT=288ms" value="2"></config-item-value>
			<config-item-value name="PWRT=WDT=72ms" value="3"></config-item-value>
			<config-item-value name="PWRT=1.5ms,WDT=18ms" value="4"></config-item-value>
			<config-item-value name="PWRT=1.5ms,WDT=4.5ms" value="5"></config-item-value>
			<config-item-value name="PWRT=1.5ms,WDT=288ms" value="6"></config-item-value>
			<config-item-value name="PWRT=1.5ms,WDT=72ms" value="7"></config-item-value>
			<description>复位时间</description>
		</config-item>
		<config-item name="内置RC频率" width="2" offset="6" default-value="1" enable="true" config-index="0">
			<config-item-value name="8M" value="0"></config-item-value>
			<config-item-value name="16M" value="1"></config-item-value>
			<config-item-value name="2M" value="2"></config-item-value>
			<config-item-value name="1M" value="3"></config-item-value>
			<description>内置RC频率</description>
		</config-item>	
		<config-item name="LVD" width="2" offset="3" default-value="0" enable="true" config-index="0">
			<config-item-value name="Disable" value="0"></config-item-value>
			<config-item-value name="2.2v" value="1"></config-item-value>
			<config-item-value name="2.4v" value="2"></config-item-value>
			<config-item-value name="2.6v" value="3"></config-item-value>
			<description>LVD</description>
		</config-item>
		<config-item name="时钟选择" width="1" offset="2" default-value="0" enable="true" config-index="0">
			<config-item-value name="IRC" value="0"></config-item-value>
			<config-item-value name="IRC and RTC" value="1"></config-item-value>
			<description>时钟选择</description>
		</config-item>						
		<config-item name="BOR滤波" width="1" offset="12" default-value="0" enable="true" config-index="1">
			<config-item-value name="Enable" value="0"></config-item-value>
			<config-item-value name="Disable" value="1"></config-item-value>
			<description>BOR滤波</description>
		</config-item>			
		<config-item name="读周期" width="1" offset="10" default-value="0" enable="true" config-index="1">
			<config-item-value name="全周期" value="0"></config-item-value>
			<config-item-value name="半周期" value="1"></config-item-value>
			<description>读周期选择</description>
		</config-item>	
		<config-item name="读端口" width="1" offset="5" default-value="0" enable="true" config-index="1">
			<config-item-value name="Form register" value="0"></config-item-value>
			<config-item-value name="Form Pins" value="1"></config-item-value>
			<description>读端口</description>
		</config-item>		
		<config-item name="系统分频" width="2" offset="2" default-value="2" enable="true" config-index="1">
			<config-item-value name="4分频" value="0"></config-item-value>
			<config-item-value name="2分频" value="2"></config-item-value>
			<config-item-value name="8分频" value="3"></config-item-value>
			<description>系统分频</description>
		</config-item>		
		<config-item name="加密" width="1" offset="1" default-value="1" enable="true" config-index="1">
			<config-item-value name="Disable" value="0"></config-item-value>
			<config-item-value name="Enable" value="1"></config-item-value>
			<description>加密</description>
		</config-item>	
		<config-item name="看门狗" width="1" offset="0" default-value="1" enable="true" config-index="1">
			<config-item-value name="Disable" value="0"></config-item-value>
			<config-item-value name="Enable" value="1"></config-item-value>
			<description>看门狗</description>
		</config-item>		
	</configs>
	
	
	<sfrs>	
		<sfr mode="fpga">
			<reg name="ACC" addr="87" read-addr="8007" write-addr="8007" value-addr="87" addr-visiable="false" bank="-1"></reg>
			<reg name="INDF" addr="00" read-addr="00" write-addr="00" value-addr="00" addr-visiable="true" bank="0"></reg>
			<reg name="PCL" addr="02" read-addr="02" write-addr="02" value-addr="02" addr-visiable="true" bank="0"></reg>
			
			<reg name="STATUS" addr="03" read-addr="03" write-addr="03" value-addr="03" addr-visiable="true" bank="0">
				<bit name="C" offset="0"></bit>
				<bit name="DC" offset="1"></bit>
				<bit name="Z" offset="2"></bit>
				<bit name="PD" offset="3"></bit>
				<bit name="TO" offset="4"></bit>
				<bit name="RP0" offset="5"></bit>
				<bit name="RP1" offset="6"></bit>
				<bit name="RST" offset="7"></bit>
			</reg>
			
			<reg name="FSR" addr="04"  read-addr="04" write-addr="04" value-addr="04" addr-visiable="true" bank="0"></reg>	
			<reg name="PORTB" addr="06"  read-addr="06" write-addr="06" value-addr="06" addr-visiable="true" bank="0"></reg>
			<reg name="PCHBUF" addr="0A"  read-addr="0a" write-addr="0a" value-addr="0a" addr-visiable="true" bank="0"></reg>
			
			<reg name="INTEN" addr="0B"  read-addr="0b" write-addr="0b" value-addr="0b" addr-visiable="true" bank="0">
				<bit name="--" offset="0"></bit>
				<bit name="PBIE" offset="1"></bit>
				<bit name="INTIE" offset="2"></bit>	
				<bit name="TC0IE" offset="3"></bit>
				<bit name="TP0IE" offset="4"></bit>	
				<bit name="INT1IE" offset="5"></bit>
				<bit name="--" offset="6"></bit>
				<bit name="GIE" offset="7"></bit>
			</reg>
			
			<reg name="INTFLAG" addr="0C"  read-addr="0c" write-addr="0c" value-addr="0c" addr-visiable="true" bank="0">
				<bit name="--" offset="0"></bit>
				<bit name="PBIF" offset="1"></bit>
				<bit name="INTIF" offset="2"></bit>	
				<bit name="TC0IF" offset="3"></bit>	
				<bit name="TP0IF" offset="4"></bit>	
				<bit name="INT1IF" offset="5"></bit>	
				<bit name="--" offset="6"></bit>
				<bit name="--" offset="7"></bit>
			</reg>
			
			<reg name="INTFLAG1" addr="0D"  read-addr="0d" write-addr="0d" value-addr="0d" addr-visiable="true" bank="0">
				<bit name="--" offset="0"></bit>
				<bit name="COMINTF" offset="1"></bit>
				<bit name="--" offset="2"></bit>	
				<bit name="--" offset="3"></bit>	
				<bit name="--" offset="4"></bit>	
				<bit name="--" offset="5"></bit>	
				<bit name="--" offset="6"></bit>
				<bit name="--" offset="7"></bit>		
			</reg>
			
			<reg name="PDCON" addr="0E"  read-addr="0e" write-addr="0e" value-addr="0e" addr-visiable="true" bank="0"></reg>
			<reg name="ODCON" addr="0F"  read-addr="0f" write-addr="0f" value-addr="0f" addr-visiable="true" bank="0"></reg>
			<reg name="PHCON" addr="10"  read-addr="10" write-addr="10" value-addr="10" addr-visiable="true" bank="0"></reg>
			<reg name="TC0L" addr="11"  read-addr="11" write-addr="11" value-addr="11" addr-visiable="true" bank="0"></reg>
			<reg name="TC0M" addr="12"  read-addr="12" write-addr="12" value-addr="12" addr-visiable="true" bank="0"></reg>
	
			
			<reg name="OPTION" addr="81"  read-addr="8001" write-addr="8001" value-addr="81" addr-visiable="true" bank="1"></reg>
			<reg name="TRISB" addr="86" read-addr="8006" write-addr="8006" value-addr="86" addr-visiable="true" bank="1"></reg>
			
			<reg name="INTEN1" addr="8D" read-addr="800d" write-addr="800d" value-addr="8d" addr-visiable="true" bank="1">
				<bit name="--" offset="0"></bit>
				<bit name="COMINTEN" offset="1"></bit>	
				<bit name="--" offset="2"></bit>
				<bit name="--" offset="3"></bit>
				<bit name="--" offset="4"></bit>
				<bit name="--" offset="5"></bit>
				<bit name="--" offset="6"></bit>	
				<bit name="--" offset="7"></bit>			
			</reg>
			
			<reg name="PCON" addr="8E" read-addr="800e" write-addr="800e" value-addr="8e" addr-visiable="true" bank="1">
				<bit name="--" offset="0"></bit>
				<bit name="--" offset="1"></bit>
				<bit name="--" offset="2"></bit>
				<bit name="--" offset="3"></bit>
				<bit name="--" offset="4"></bit>
				<bit name="LVDTE" offset="5"></bit>
				<bit name="EIS" offset="6"></bit>
				<bit name="WDTE" offset="7"></bit>
			</reg>

			<reg name="WUCON" addr="8F" read-addr="800f" write-addr="800f" value-addr="8f" addr-visiable="true" bank="1"></reg>	
			<reg name="PBIC0" addr="91" read-addr="8011" write-addr="8011" value-addr="91" addr-visiable="true" bank="1"></reg>	

			<reg name="OSCM" addr="94" read-addr="8014" write-addr="8014" value-addr="94" addr-visiable="true" bank="1">
				<bit name="CLKMD" offset="0"></bit>
				<bit name="STPHX" offset="1"></bit>
				<bit name="XTSEL" offset="2"></bit>	
				<bit name="SLCON" offset="3"></bit>	
				<bit name="SLT0C" offset="4"></bit>	
				<bit name="GREENEN" offset="5"></bit>	
				<bit name="WAKEMODE" offset="6"></bit>
				<bit name="--" offset="7"></bit>			
			</reg>	
			
			<reg name="PWM0EN" addr="111" read-addr="4011" write-addr="4011" value-addr="111" addr-visiable="true" bank="2">
				<bit name="PWM0EN" offset="0"></bit>
				<bit name="PWM0OEN" offset="1"></bit>
				<bit name="PWM01OEN" offset="2"></bit>	
				<bit name="PWM0M" offset="3"></bit>	
				<bit name="PWM1OEN" offset="4"></bit>	
				<bit name="TPSEL8" offset="5"></bit>	
				<bit name="--" offset="6"></bit>
				<bit name="TPEN" offset="7"></bit>
			</reg>		
			
			<reg name="PWM0C" addr="112" read-addr="4012" write-addr="4012" value-addr="112" addr-visiable="true" bank="2">
				<bit name="CK00" offset="0"></bit>
				<bit name="CK01" offset="1"></bit>
				<bit name="PWM0S0" offset="2"></bit>	
				<bit name="PWM0S1" offset="3"></bit>	
				<bit name="--" offset="4"></bit>	
				<bit name="--" offset="5"></bit>	
				<bit name="CK02" offset="6"></bit>
				<bit name="CK03" offset="7"></bit>
			</reg>		
			
			<reg name="PWM0TL" addr="113" read-addr="4013" write-addr="4013" value-addr="113" addr-visiable="true" bank="2"></reg>		
			<reg name="PWM0TH" addr="114" read-addr="4014" write-addr="4014" value-addr="114" addr-visiable="true" bank="2"></reg>	
			<reg name="PWM0PL" addr="115" read-addr="4015" write-addr="4015" value-addr="115" addr-visiable="true" bank="2"></reg>	
			<reg name="PWM0PH" addr="116" read-addr="4016" write-addr="4016" value-addr="116" addr-visiable="true" bank="2"></reg>
			<reg name="PWM0DL" addr="117" read-addr="4017" write-addr="4017" value-addr="117" addr-visiable="true" bank="2"></reg>
			<reg name="PWM0DH" addr="118" read-addr="4018" write-addr="4018" value-addr="118" addr-visiable="true" bank="2"></reg>
			<reg name="PWM0DTL" addr="119" read-addr="4019" write-addr="4019" value-addr="119" addr-visiable="true" bank="2"></reg>
			<reg name="PWM0DTH" addr="11A" read-addr="401a" write-addr="401a" value-addr="11a" addr-visiable="true" bank="2"></reg>
			
			<reg name="PWMPSCON" addr="11B" read-addr="401b" write-addr="401b" value-addr="11b" addr-visiable="true" bank="2">
				<bit name="PWM0S0" offset="0"></bit>
				<bit name="PWM0S1" offset="1"></bit>
				<bit name="PWM01S0" offset="2"></bit>	
				<bit name="PWM01S1" offset="3"></bit>	
				<bit name="PWM1S0" offset="4"></bit>	
				<bit name="PWM1S0" offset="5"></bit>	
				<bit name="--" offset="6"></bit>
				<bit name="--" offset="7"></bit>		
			</reg>
			
			<reg name="PWM1DL" addr="11C" read-addr="401c" write-addr="401c" value-addr="11c" addr-visiable="true" bank="2"></reg>
			<reg name="PWM1DH" addr="11D" read-addr="401d" write-addr="401d" value-addr="11d" addr-visiable="true" bank="2"></reg>	

			<reg name="CMPCON" addr="19E" read-addr="c01e" write-addr="c01e" value-addr="19E" addr-visiable="true" bank="3">
				<bit name="--" offset="0"></bit>
				<bit name="COPOL" offset="1"></bit>
				<bit name="CVEN" offset="2"></bit>	
				<bit name="CPEN" offset="3"></bit>	
				<bit name="CODEB" offset="4"></bit>	
				<bit name="FTCKS" offset="5"></bit>	
				<bit name="CMPIF" offset="6"></bit>
				<bit name="CMPEN" offset="7"></bit>			
			</reg>
			<reg name="CMPM" addr="19F" read-addr="c01f" write-addr="c01f" value-addr="19F" addr-visiable="true" bank="3">
				<bit name="VRS0" offset="0"></bit>
				<bit name="VRS1" offset="1"></bit>
				<bit name="VRS2" offset="2"></bit>	
				<bit name="VRS3" offset="3"></bit>	
				<bit name="XRVSEL" offset="4"></bit>	
				<bit name="CPINS0" offset="5"></bit>	
				<bit name="CPINS1" offset="6"></bit>
				<bit name="--" offset="7"></bit>			
			</reg>	
		</sfr>
		
		
		<sfr mode="ic">
			<reg name="ACC" addr="ff0" read-addr="ff0" write-addr="ff0" value-addr="ff0" addr-visiable="false" bank="-1"></reg>
			<reg name="INDF" addr="00" read-addr="00" write-addr="00" value-addr="00" addr-visiable="true" bank="0"></reg>
			<reg name="PCL" addr="02" read-addr="02" write-addr="02" value-addr="02" addr-visiable="true" bank="0"></reg>
			
			<reg name="STATUS" addr="03" read-addr="03" write-addr="03" value-addr="03" addr-visiable="true" bank="0">
				<bit name="C" offset="0"></bit>
				<bit name="DC" offset="1"></bit>
				<bit name="Z" offset="2"></bit>
				<bit name="PD" offset="3"></bit>
				<bit name="TO" offset="4"></bit>
				<bit name="RP0" offset="5"></bit>
				<bit name="RP1" offset="6"></bit>
				<bit name="RST" offset="7"></bit>
			</reg>
			
			<reg name="FSR" addr="04"  read-addr="04" write-addr="04" value-addr="04" addr-visiable="true" bank="0"></reg>	
			<reg name="PORTB" addr="06"  read-addr="06" write-addr="06" value-addr="06" addr-visiable="true" bank="0"></reg>
			<reg name="PCLATH" addr="0A"  read-addr="0a" write-addr="0a" value-addr="0a" addr-visiable="true" bank="0"></reg>
			
			<reg name="INTEN" addr="0B"  read-addr="0b" write-addr="0b" value-addr="0b" addr-visiable="true" bank="0">
				<bit name="--" offset="0"></bit>
				<bit name="PBIE" offset="1"></bit>
				<bit name="INTIE" offset="2"></bit>	
				<bit name="TC0IE" offset="3"></bit>
				<bit name="TP0IE" offset="4"></bit>	
				<bit name="INT1IE" offset="5"></bit>
				<bit name="--" offset="6"></bit>
				<bit name="GIE" offset="7"></bit>
			</reg>
			
			<reg name="INTFLAG" addr="0C"  read-addr="0c" write-addr="0c" value-addr="0c" addr-visiable="true" bank="0">
				<bit name="--" offset="0"></bit>
				<bit name="PBIF" offset="1"></bit>
				<bit name="INTIF" offset="2"></bit>	
				<bit name="TC0IF" offset="3"></bit>	
				<bit name="TP0IF" offset="4"></bit>	
				<bit name="INT1IF" offset="5"></bit>	
				<bit name="--" offset="6"></bit>
				<bit name="--" offset="7"></bit>
			</reg>
			
			<reg name="INTFLAG1" addr="0D"  read-addr="0d" write-addr="0d" value-addr="0d" addr-visiable="true" bank="0">
				<bit name="--" offset="0"></bit>
				<bit name="COMINTF" offset="1"></bit>
				<bit name="--" offset="2"></bit>	
				<bit name="--" offset="3"></bit>	
				<bit name="--" offset="4"></bit>	
				<bit name="--" offset="5"></bit>	
				<bit name="--" offset="6"></bit>
				<bit name="--" offset="7"></bit>		
			</reg>
			
			<reg name="PDCON" addr="0E"  read-addr="0e" write-addr="0e" value-addr="0e" addr-visiable="true" bank="0"></reg>
			<reg name="ODCON" addr="0F"  read-addr="0f" write-addr="0f" value-addr="0f" addr-visiable="true" bank="0"></reg>
			<reg name="PHCON" addr="10"  read-addr="10" write-addr="10" value-addr="10" addr-visiable="true" bank="0"></reg>
			<reg name="TC0L" addr="11"  read-addr="11" write-addr="11" value-addr="11" addr-visiable="true" bank="0"></reg>
			<reg name="TC0M" addr="12"  read-addr="12" write-addr="12" value-addr="12" addr-visiable="true" bank="0"></reg>
		
			
			<reg name="OPTION" addr="ff4"  read-addr="ff4" write-addr="ff4" value-addr="ff4" addr-visiable="true" bank="1"></reg>
			<reg name="TRISB" addr="ff6" read-addr="ff6" write-addr="ff6" value-addr="ff6" addr-visiable="true" bank="1"></reg>
			
			<reg name="INTEN1" addr="8D" read-addr="010d" write-addr="010d" value-addr="8d" addr-visiable="true" bank="1">
				<bit name="--" offset="0"></bit>
				<bit name="COMINTEN" offset="1"></bit>	
				<bit name="--" offset="2"></bit>
				<bit name="--" offset="3"></bit>
				<bit name="--" offset="4"></bit>
				<bit name="--" offset="5"></bit>
				<bit name="--" offset="6"></bit>	
				<bit name="--" offset="7"></bit>			
			</reg>
			
			<reg name="PCON" addr="8E" read-addr="010e" write-addr="010e" value-addr="8e" addr-visiable="true" bank="1">
				<bit name="--" offset="0"></bit>
				<bit name="--" offset="1"></bit>
				<bit name="--" offset="2"></bit>
				<bit name="--" offset="3"></bit>
				<bit name="--" offset="4"></bit>
				<bit name="LVDTE" offset="5"></bit>
				<bit name="EIS" offset="6"></bit>
				<bit name="WDTE" offset="7"></bit>
			</reg>

			<reg name="WUCON" addr="8F" read-addr="010f" write-addr="010f" value-addr="8f" addr-visiable="true" bank="1"></reg>	
			<reg name="PBIC0" addr="91" read-addr="0111" write-addr="0111" value-addr="91" addr-visiable="true" bank="1"></reg>	
			<reg name="OSCM" addr="94" read-addr="0114" write-addr="0114" value-addr="94" addr-visiable="true" bank="1">
				<bit name="CLKMD" offset="0"></bit>
				<bit name="STPHX" offset="1"></bit>
				<bit name="XTSEL" offset="2"></bit>	
				<bit name="SLCON" offset="3"></bit>	
				<bit name="SLT0C" offset="4"></bit>	
				<bit name="GREENEN" offset="5"></bit>	
				<bit name="WAKEMODE" offset="6"></bit>
				<bit name="--" offset="7"></bit>			
			</reg>	
			
			<reg name="PWM0EN" addr="111" read-addr="0211" write-addr="0211" value-addr="111" addr-visiable="true" bank="2">
				<bit name="LOADEN" offset="0"></bit>
				<bit name="PWM0XEN" offset="1"></bit>
				<bit name="PWM01XEN" offset="2"></bit>	
				<bit name="--" offset="3"></bit>	
				<bit name="PWM1XEN" offset="4"></bit>	
				<bit name="TP0SEL8" offset="5"></bit>	
				<bit name="--" offset="6"></bit>
				<bit name="TP0EN" offset="7"></bit>
			</reg>		
			
			<reg name="PWM0C" addr="112" read-addr="0212" write-addr="0212" value-addr="112" addr-visiable="true" bank="2">
				<bit name="CK00" offset="0"></bit>
				<bit name="CK01" offset="1"></bit>
				<bit name="PWM0S0" offset="2"></bit>	
				<bit name="PWM0S1" offset="3"></bit>	
				<bit name="PWM0S2" offset="4"></bit>	
				<bit name="--" offset="5"></bit>	
				<bit name="CK02" offset="6"></bit>
				<bit name="CK03" offset="7"></bit>
			</reg>		
			
			<reg name="PWM0TL" addr="113" read-addr="0213" write-addr="0213" value-addr="113" addr-visiable="true" bank="2"></reg>		
			<reg name="PWM0TH" addr="114" read-addr="0214" write-addr="0214" value-addr="114" addr-visiable="true" bank="2"></reg>	
			<reg name="PWM0PL" addr="115" read-addr="0215" write-addr="0215" value-addr="115" addr-visiable="true" bank="2"></reg>	
			<reg name="PWM0PH" addr="116" read-addr="0216" write-addr="0216" value-addr="116" addr-visiable="true" bank="2"></reg>
			<reg name="PWM0DL" addr="117" read-addr="0217" write-addr="0217" value-addr="117" addr-visiable="true" bank="2"></reg>
			<reg name="PWM0DH" addr="118" read-addr="0218" write-addr="0218" value-addr="118" addr-visiable="true" bank="2"></reg>
			<reg name="PWM0DTL" addr="119" read-addr="0219" write-addr="0219" value-addr="119" addr-visiable="true" bank="2"></reg>
			<reg name="PWM0DTH" addr="11A" read-addr="021a" write-addr="021a" value-addr="11a" addr-visiable="true" bank="2"></reg>
			
			<reg name="PWMPSCON" addr="11B" read-addr="021b" write-addr="021b" value-addr="11b" addr-visiable="true" bank="2">
				<bit name="PWM0S0" offset="0"></bit>
				<bit name="PWM0S1" offset="1"></bit>
				<bit name="PWM01S0" offset="2"></bit>	
				<bit name="PWM01S1" offset="3"></bit>	
				<bit name="PWM1S0" offset="4"></bit>	
				<bit name="PWM1S0" offset="5"></bit>	
				<bit name="--" offset="6"></bit>
				<bit name="--" offset="7"></bit>		
			</reg>
			
			<reg name="PWM1DL" addr="11C" read-addr="021c" write-addr="021c" value-addr="11c" addr-visiable="true" bank="2"></reg>
			<reg name="PWM1DH" addr="11D" read-addr="021d" write-addr="021d" value-addr="11d" addr-visiable="true" bank="2"></reg>
			

			<reg name="CMPCON" addr="19E" read-addr="031e" write-addr="031e" value-addr="19e" addr-visiable="true" bank="3">
				<bit name="--" offset="0"></bit>
				<bit name="COPOL" offset="1"></bit>
				<bit name="CVEN" offset="2"></bit>	
				<bit name="CPEN" offset="3"></bit>	
				<bit name="CODEB" offset="4"></bit>	
				<bit name="FTCKS" offset="5"></bit>	
				<bit name="CMPIF" offset="6"></bit>
				<bit name="CMPEN" offset="7"></bit>			
			</reg>
			<reg name="CMPM" addr="19F" read-addr="031f" write-addr="031f" value-addr="19f" addr-visiable="true" bank="3">
				<bit name="VRS0" offset="0"></bit>
				<bit name="VRS1" offset="1"></bit>
				<bit name="VRS2" offset="2"></bit>	
				<bit name="VRS3" offset="3"></bit>	
				<bit name="XRVSEL" offset="4"></bit>	
				<bit name="CPINS0" offset="5"></bit>	
				<bit name="CPINS1" offset="6"></bit>
				<bit name="--" offset="7"></bit>			
			</reg>	
		</sfr>		
	</sfrs>
	<insts>
		<inst name="call" value="1000" mask-value="3800"/>
		<inst name="return" value="007c" mask-value="3fff"/>
		<inst name="return" value="007e" mask-value="3fff"/>
		<inst name="return" value="3c00" mask-value="3c00"/>
	</insts>
	<compilers>
		<compiler>	
			<compiler-item type="c" name="cc1" command-path="$(DevEnvDir)\cc1.exe">
				<option>-chip $(ChipName) -rom-size $(UserRomSize) -banks 4 -ram-bank 40-6f -common 70-7F -rst-addr 0h -int-addr 04h -tran-exe ptran2.exe  -debug false  -prj-name "$(ProjectName)" -work-dir "$(ProjectDir)" -output-dir "$(OutDir)" -picc-path "$(CompilerPath)" -config "$(ConfigWord)" -out-type $(ProjectType) "-I$(DevEnvDir)\include" $AddEndponitStrForeach('"','"',$AddEndponitStrForeach('-I','',$GetFolders('?'),'?','?'),'?',' ') $AddEndponitStrForeach('"','"',$GetFiles('.c;.lpp','?'),'?',' ')</option>
				<action-before-compile>
				</action-before-compile> 
				<action-after-compile >
					<action-item  name="ccs_e" command-path="$(DevEnvDir)\ccs_e.exe">"$(ProjectDir)\$(ProjectName).ccs" -E  $(CCSFileVer) $(CcsProtect)</action-item>
					<action-item  name="configchanger" command-path="$(DevEnvDir)\configchanger.exe">"$(ProjectDir)\$(ProjectName).ccs" -cfg1 0000 df7f -cfg3 0000 fffd</action-item>
				</action-after-compile>
			</compiler-item>
			<compiler-item type="asm" name="ac0" command-path="$(DevEnvDir)\ac0.exe">
				<option>-chip $(ChipName) -rom-size $(UserRomSize) -ram-start $(RamStartAddr) -ram-size $(RamSize) -reset-addr $(ResetAddr) -inst-set INST_SET_FM153 -otp-body-size $(OtpBodySize) -debug false -symbol-file true  -listfile true -workdir "$(ProjectDir)" -include-path "$GetFolders(';')" -file "$(EntryFile)" -output "$(OutDir)" -project-name "$(ProjectName)" -config "$(ConfigWord)"</option>
				<action-before-compile>
				</action-before-compile>
				<action-after-compile>
					<action-item  name="ccs_e" command-path="$(DevEnvDir)\ccs_e.exe">"$(ProjectDir)\$(ProjectName).ccs" -E $(CCSFileVer) $(CcsProtect)</action-item>
					<action-item  name="configchanger" command-path="$(DevEnvDir)\configchanger.exe">"$(ProjectDir)\$(ProjectName).ccs" -cfg1 0000 df7f -cfg3 0000 fffd</action-item>
				</action-after-compile>
			</compiler-item>
			<compiler-item type="c" name="cc1" out-type="lib" command-path="$(DevEnvDir)\cc1.exe">
				<option>-chip $(ChipName) -rom-size $(UserRomSize) -banks 4 -ram-bank 40-6f -common 70-7F -rst-addr 0h -int-addr 04h -tran-exe ptran2.exe  -debug false  -prj-name "$(ProjectName)" -work-dir "$(ProjectDir)" -output-dir "$(OutDir)" -picc-path "$(CompilerPath)" -config "$(ConfigWord)" -out-type $(ProjectType) "-I$(DevEnvDir)\include" $AddEndponitStrForeach('"','"',$AddEndponitStrForeach('-I','',$GetFolders('?'),'?','?'),'?',' ') $AddEndponitStrForeach('"','"',$GetFiles('.c;.lpp','?'),'?',' ')</option>
			</compiler-item>			
		</compiler>
	</compilers>
	<debugers>
		<debuger>
			<debuger-asm>ac0</debuger-asm>
			<debuger-c>picc</debuger-c>
			<device type="1" version="0">
				<simulator type="1" version="0" code-first="true" config-item="true" config-item-id="7">
					<pc-addr pcl="02" pch="8002" />
					<ram-mode>fpga</ram-mode>
					<sfr-mode>fpga</sfr-mode>
					<config-word-addr>400</config-word-addr>
				</simulator>
			</device>
			<action-before-debug-start></action-before-debug-start>
			<action-after-debug-start></action-after-debug-start>
		</debuger>
		<debuger>
			<debuger-asm>ac0</debuger-asm>
			<debuger-c>picc</debuger-c>	
			<device type="5" version="0">
				<simulator type="5" version="0" code-first="false" config-item="false" config-item-id="-1">
					<stack>5</stack>
					<id>fe38</id>
					<pc-addr pcl="3f1" pch="3f2" />
					<ram-mode>ic</ram-mode>
					<sfr-mode>ic</sfr-mode>	
					<config-word-addr>400</config-word-addr>
				</simulator>
				<simulator type="6" version="0" code-first="false" config-item="false" config-item-id="-1">
					<stack>8</stack>
					<id>fc39</id>	
					<pc-addr pcl="3f1" pch="3f2" />	
					<ram-mode>ic</ram-mode>
					<sfr-mode>ic</sfr-mode>	
					<config-word-addr>400</config-word-addr>	
				</simulator>
			</device>
			<action-before-debug-start></action-before-debug-start>
			<action-after-debug-start></action-after-debug-start>			
		</debuger>			
	</debugers>
	<editor-language>
		<c-lang name="c1-lang"/>
		<asm-lang name="asm1-lang"/>
	</editor-language>	
</chip>