
# 1 "D:\Workspace\华芯技术支持资料包\HS16F1211开发资料\HS16F1211_cCode\HS16F1211_TMR0\main.c"

# 35 "D:\Workspace\华芯技术支持资料包\HS16F1211开发资料\HS16F1211_cCode\HS16F1211_TMR0\hs16f1211.h"
volatile unsigned char INDF @ 0x000;



volatile unsigned char PCL @ 0x002;



volatile unsigned char STATUS @ 0x003;

volatile bit CARRY @ ((unsigned)&STATUS*8)+0;
volatile bit ZERO @ ((unsigned)&STATUS*8)+2;
volatile bit nPD @ ((unsigned)&STATUS*8)+3;
volatile bit FnPD @ ((unsigned)&STATUS*8)+3;
volatile bit nTO @ ((unsigned)&STATUS*8)+4;
volatile bit FnTO @ ((unsigned)&STATUS*8)+4;
volatile bit IRP @ ((unsigned)&STATUS*8)+7;

volatile bit C @ ((unsigned)&STATUS*8)+0;
volatile bit DC @ ((unsigned)&STATUS*8)+1;
volatile bit Z @ ((unsigned)&STATUS*8)+2;
volatile bit NPD @ ((unsigned)&STATUS*8)+3;
volatile bit NTO @ ((unsigned)&STATUS*8)+4;
volatile bit RP0 @ ((unsigned)&STATUS*8)+5;
volatile bit RP1 @ ((unsigned)&STATUS*8)+6;
volatile bit RST @ ((unsigned)&STATUS*8)+7;

volatile bit FC @ ((unsigned)&STATUS*8)+0;
volatile bit FDC @ ((unsigned)&STATUS*8)+1;
volatile bit FZ @ ((unsigned)&STATUS*8)+2;
volatile bit FNPD @ ((unsigned)&STATUS*8)+3;
volatile bit FNTO @ ((unsigned)&STATUS*8)+4;
volatile bit FRP0 @ ((unsigned)&STATUS*8)+5;
volatile bit FRP1 @ ((unsigned)&STATUS*8)+6;
volatile bit FRST @ ((unsigned)&STATUS*8)+7;


volatile unsigned char FSR @ 0x004;

volatile bit FSR_7 @ ((unsigned)&FSR*8)+7;
volatile bit FFSR_7 @ ((unsigned)&FSR*8)+7;


volatile unsigned char PCHBUF @ 0x00A;


volatile bit PCH0 @ ((unsigned)&PCHBUF*8)+0;
volatile bit PCH1 @ ((unsigned)&PCHBUF*8)+1;
volatile bit PCH2 @ ((unsigned)&PCHBUF*8)+2;

volatile bit FPCH0 @ ((unsigned)&PCHBUF*8)+0;
volatile bit FPCH1 @ ((unsigned)&PCHBUF*8)+1;
volatile bit FPCH2 @ ((unsigned)&PCHBUF*8)+2;


volatile unsigned char INTEN @ 0x00B;

volatile bit FT0IE @ ((unsigned)&INTEN*8)+0;
volatile bit FPBIE @ ((unsigned)&INTEN*8)+1;
volatile bit FINTIE @ ((unsigned)&INTEN*8)+2;
volatile bit FTC0IE @ ((unsigned)&INTEN*8)+3;
volatile bit FTP0IE @ ((unsigned)&INTEN*8)+4;
volatile bit FINT1IE @ ((unsigned)&INTEN*8)+5;
volatile bit FGIE @ ((unsigned)&INTEN*8)+7;

volatile bit T0IE @ ((unsigned)&INTEN*8)+0;
volatile bit PBIE @ ((unsigned)&INTEN*8)+1;
volatile bit INTIE @ ((unsigned)&INTEN*8)+2;
volatile bit TC0IE @ ((unsigned)&INTEN*8)+3;
volatile bit TP0IE @ ((unsigned)&INTEN*8)+4;
volatile bit INT1IE @ ((unsigned)&INTEN*8)+5;
volatile bit GIE @ ((unsigned)&INTEN*8)+7;


volatile unsigned char INTFLAG @ 0x00C;

volatile bit FT0IF @ ((unsigned)&INTFLAG*8)+0;
volatile bit FPBIF @ ((unsigned)&INTFLAG*8)+1;
volatile bit FINTIF @ ((unsigned)&INTFLAG*8)+2;
volatile bit FTC0IF @ ((unsigned)&INTFLAG*8)+3;
volatile bit FTP0IF @ ((unsigned)&INTFLAG*8)+4;
volatile bit FINT1IF @ ((unsigned)&INTFLAG*8)+5;

volatile bit T0IF @ ((unsigned)&INTFLAG*8)+0;
volatile bit PBIF @ ((unsigned)&INTFLAG*8)+1;
volatile bit INTIF @ ((unsigned)&INTFLAG*8)+2;
volatile bit TC0IF @ ((unsigned)&INTFLAG*8)+3;
volatile bit TP0IF @ ((unsigned)&INTFLAG*8)+4;
volatile bit INT1IF @ ((unsigned)&INTFLAG*8)+5;

# 131
volatile unsigned char TMR0 @ 0x001;



volatile unsigned char PORTA @ 0x005;
volatile unsigned char RA @ 0x005;
volatile unsigned char PA @ 0x005;

volatile bit FPA0 @ ((unsigned)&PORTA*8)+0;
volatile bit FPA1 @ ((unsigned)&PORTA*8)+1;
volatile bit FPA2 @ ((unsigned)&PORTA*8)+2;
volatile bit FPA3 @ ((unsigned)&PORTA*8)+3;
volatile bit FPA4 @ ((unsigned)&PORTA*8)+4;
volatile bit FPA5 @ ((unsigned)&PORTA*8)+5;

volatile bit PA0 @ ((unsigned)&PORTA*8)+0;
volatile bit PA1 @ ((unsigned)&PORTA*8)+1;
volatile bit PA2 @ ((unsigned)&PORTA*8)+2;
volatile bit PA3 @ ((unsigned)&PORTA*8)+3;
volatile bit PA4 @ ((unsigned)&PORTA*8)+4;
volatile bit PA5 @ ((unsigned)&PORTA*8)+5;



volatile unsigned char PORTB @ 0x006;
volatile unsigned char RB @ 0x006;
volatile unsigned char PB @ 0x006;

volatile bit FPB0 @ ((unsigned)&PORTB*8)+0;
volatile bit FPB1 @ ((unsigned)&PORTB*8)+1;
volatile bit FPB2 @ ((unsigned)&PORTB*8)+2;
volatile bit FPB3 @ ((unsigned)&PORTB*8)+3;
volatile bit FPB4 @ ((unsigned)&PORTB*8)+4;
volatile bit FPB5 @ ((unsigned)&PORTB*8)+5;
volatile bit FPB6 @ ((unsigned)&PORTB*8)+6;
volatile bit FPB7 @ ((unsigned)&PORTB*8)+7;

volatile bit PB0 @ ((unsigned)&PORTB*8)+0;
volatile bit PB1 @ ((unsigned)&PORTB*8)+1;
volatile bit PB2 @ ((unsigned)&PORTB*8)+2;
volatile bit PB3 @ ((unsigned)&PORTB*8)+3;
volatile bit PB4 @ ((unsigned)&PORTB*8)+4;
volatile bit PB5 @ ((unsigned)&PORTB*8)+5;
volatile bit PB6 @ ((unsigned)&PORTB*8)+6;
volatile bit PB7 @ ((unsigned)&PORTB*8)+7;


volatile unsigned char INTFLAG1 @ 0x0D;


volatile bit FCOMINTF @ ((unsigned)&INTFLAG1*8)+1;


volatile bit COMINTF @ ((unsigned)&INTFLAG1*8)+1;



volatile unsigned char PDCON @ 0x00E;

volatile bit PDA0 @ ((unsigned)&PDCON*8)+0;
volatile bit PDA1 @ ((unsigned)&PDCON*8)+1;
volatile bit PDA2 @ ((unsigned)&PDCON*8)+2;
volatile bit PDA3 @ ((unsigned)&PDCON*8)+3;
volatile bit PDB0 @ ((unsigned)&PDCON*8)+4;
volatile bit PDB1 @ ((unsigned)&PDCON*8)+5;
volatile bit PDB2 @ ((unsigned)&PDCON*8)+6;
volatile bit PDB3 @ ((unsigned)&PDCON*8)+7;

volatile bit FPDA0 @ ((unsigned)&PDCON*8)+0;
volatile bit FPDA1 @ ((unsigned)&PDCON*8)+1;
volatile bit FPDA2 @ ((unsigned)&PDCON*8)+2;
volatile bit FPDA3 @ ((unsigned)&PDCON*8)+3;
volatile bit FPDB0 @ ((unsigned)&PDCON*8)+4;
volatile bit FPDB1 @ ((unsigned)&PDCON*8)+5;
volatile bit FPDB2 @ ((unsigned)&PDCON*8)+6;
volatile bit FPDB3 @ ((unsigned)&PDCON*8)+7;



volatile unsigned char ODCON @ 0x00F;

volatile bit ODB0 @ ((unsigned)&ODCON*8)+0;
volatile bit ODB1 @ ((unsigned)&ODCON*8)+1;
volatile bit ODB2 @ ((unsigned)&ODCON*8)+2;
volatile bit ODB3 @ ((unsigned)&ODCON*8)+3;
volatile bit ODB4 @ ((unsigned)&ODCON*8)+4;
volatile bit ODB5 @ ((unsigned)&ODCON*8)+5;
volatile bit ODB6 @ ((unsigned)&ODCON*8)+6;
volatile bit ODB7 @ ((unsigned)&ODCON*8)+7;

volatile bit FODB0 @ ((unsigned)&ODCON*8)+0;
volatile bit FODB1 @ ((unsigned)&ODCON*8)+1;
volatile bit FODB2 @ ((unsigned)&ODCON*8)+2;
volatile bit FODB3 @ ((unsigned)&ODCON*8)+3;
volatile bit FODB4 @ ((unsigned)&ODCON*8)+4;
volatile bit FODB5 @ ((unsigned)&ODCON*8)+5;
volatile bit FODB6 @ ((unsigned)&ODCON*8)+6;
volatile bit FODB7 @ ((unsigned)&ODCON*8)+7;




volatile unsigned char PHCON @ 0x010;

volatile bit PHB0 @ ((unsigned)&PHCON*8)+0;
volatile bit PHB1 @ ((unsigned)&PHCON*8)+1;
volatile bit PHB2 @ ((unsigned)&PHCON*8)+2;
volatile bit PHB3 @ ((unsigned)&PHCON*8)+3;
volatile bit PHB4 @ ((unsigned)&PHCON*8)+4;
volatile bit PHB5 @ ((unsigned)&PHCON*8)+5;
volatile bit PHB6 @ ((unsigned)&PHCON*8)+6;
volatile bit PHB7 @ ((unsigned)&PHCON*8)+7;

volatile bit FPHB0 @ ((unsigned)&PHCON*8)+0;
volatile bit FPHB1 @ ((unsigned)&PHCON*8)+1;
volatile bit FPHB2 @ ((unsigned)&PHCON*8)+2;
volatile bit FPHB3 @ ((unsigned)&PHCON*8)+3;
volatile bit FPHB4 @ ((unsigned)&PHCON*8)+4;
volatile bit FPHB5 @ ((unsigned)&PHCON*8)+5;
volatile bit FPHB6 @ ((unsigned)&PHCON*8)+6;
volatile bit FPHB7 @ ((unsigned)&PHCON*8)+7;


volatile unsigned char TC0L @ 0x011;



volatile unsigned char TC0M @ 0x012;

volatile bit FPWM0 @ ((unsigned)&TC0M*8)+0;
volatile bit FBUZ @ ((unsigned)&TC0M*8)+1;
volatile bit FT16SEL @ ((unsigned)&TC0M*8)+2;
volatile bit FTCCKS @ ((unsigned)&TC0M*8)+3;
volatile bit FTC0S0 @ ((unsigned)&TC0M*8)+4;
volatile bit FTC0S1 @ ((unsigned)&TC0M*8)+5;
volatile bit FTC0S2 @ ((unsigned)&TC0M*8)+6;
volatile bit FTC0TR @ ((unsigned)&TC0M*8)+7;

volatile bit PWM0 @ ((unsigned)&TC0M*8)+0;
volatile bit BUZ @ ((unsigned)&TC0M*8)+1;
volatile bit T16SEL @ ((unsigned)&TC0M*8)+2;
volatile bit TCCKS @ ((unsigned)&TC0M*8)+3;
volatile bit TC0S0 @ ((unsigned)&TC0M*8)+4;
volatile bit TC0S1 @ ((unsigned)&TC0M*8)+5;
volatile bit TC0S2 @ ((unsigned)&TC0M*8)+6;
volatile bit TC0TR @ ((unsigned)&TC0M*8)+7;


volatile unsigned char TC0R @ 0x013;



volatile unsigned char TC0H @ 0x014;




volatile unsigned char TC0D1 @ 0x015;




volatile unsigned char TC0D2 @ 0x016;




volatile unsigned char PWMCON @ 0x017;

volatile bit FPWM1EN @ ((unsigned)&PWMCON*8)+0;
volatile bit FPWM2EN @ ((unsigned)&PWMCON*8)+1;
volatile bit FPWM1S @ ((unsigned)&PWMCON*8)+2;
volatile bit FPWM2S @ ((unsigned)&PWMCON*8)+3;
volatile bit FPWM1XR0 @ ((unsigned)&PWMCON*8)+4;
volatile bit FPWM1XR1 @ ((unsigned)&PWMCON*8)+5;
volatile bit FPWM2XR0 @ ((unsigned)&PWMCON*8)+6;
volatile bit FPWM2XR1 @ ((unsigned)&PWMCON*8)+7;

volatile bit PWM1EN @ ((unsigned)&PWMCON*8)+0;
volatile bit PWM2EN @ ((unsigned)&PWMCON*8)+1;
volatile bit PWM1S @ ((unsigned)&PWMCON*8)+2;
volatile bit PWM2S @ ((unsigned)&PWMCON*8)+3;
volatile bit PWM1XR0 @ ((unsigned)&PWMCON*8)+4;
volatile bit PWM1XR1 @ ((unsigned)&PWMCON*8)+5;
volatile bit PWM2XR0 @ ((unsigned)&PWMCON*8)+6;
volatile bit PWM2XR1 @ ((unsigned)&PWMCON*8)+7;

# 329
volatile unsigned char OPTION_REG @ 0x081;


volatile bit FPS0 @ ((unsigned)&OPTION_REG*8)+0;
volatile bit FPS1 @ ((unsigned)&OPTION_REG*8)+1;
volatile bit FPS2 @ ((unsigned)&OPTION_REG*8)+2;
volatile bit FPSA @ ((unsigned)&OPTION_REG*8)+3;
volatile bit FT0SE @ ((unsigned)&OPTION_REG*8)+4;
volatile bit FT0CS @ ((unsigned)&OPTION_REG*8)+5;
volatile bit FINTEDG @ ((unsigned)&OPTION_REG*8)+6;
volatile bit FINTEDG1 @ ((unsigned)&OPTION_REG*8)+7;

volatile bit PS0 @ ((unsigned)&OPTION_REG*8)+0;
volatile bit PS1 @ ((unsigned)&OPTION_REG*8)+1;
volatile bit PS2 @ ((unsigned)&OPTION_REG*8)+2;
volatile bit PSA @ ((unsigned)&OPTION_REG*8)+3;
volatile bit T0SE @ ((unsigned)&OPTION_REG*8)+4;
volatile bit T0CS @ ((unsigned)&OPTION_REG*8)+5;
volatile bit INTEDG @ ((unsigned)&OPTION_REG*8)+6;
volatile bit INTEDG1 @ ((unsigned)&OPTION_REG*8)+7;


volatile unsigned char TRISA @ 0x085;


volatile bit TRISA0 @ ((unsigned)&TRISA*8)+0;
volatile bit TRISA1 @ ((unsigned)&TRISA*8)+1;
volatile bit TRISA2 @ ((unsigned)&TRISA*8)+2;
volatile bit TRISA3 @ ((unsigned)&TRISA*8)+3;
volatile bit TRISA4 @ ((unsigned)&TRISA*8)+4;
volatile bit TRISA5 @ ((unsigned)&TRISA*8)+5;

volatile bit FTRISA0 @ ((unsigned)&TRISA*8)+0;
volatile bit FTRISA1 @ ((unsigned)&TRISA*8)+1;
volatile bit FTRISA2 @ ((unsigned)&TRISA*8)+2;
volatile bit FTRISA3 @ ((unsigned)&TRISA*8)+3;
volatile bit FTRISA4 @ ((unsigned)&TRISA*8)+4;
volatile bit FTRISA5 @ ((unsigned)&TRISA*8)+5;


volatile unsigned char TRISB @ 0x086;


volatile bit TRISB0 @ ((unsigned)&TRISB*8)+0;
volatile bit TRISB1 @ ((unsigned)&TRISB*8)+1;
volatile bit TRISB2 @ ((unsigned)&TRISB*8)+2;
volatile bit TRISB3 @ ((unsigned)&TRISB*8)+3;
volatile bit TRISB4 @ ((unsigned)&TRISB*8)+4;
volatile bit TRISB5 @ ((unsigned)&TRISB*8)+5;
volatile bit TRISB6 @ ((unsigned)&TRISB*8)+6;
volatile bit TRISB7 @ ((unsigned)&TRISB*8)+7;

volatile bit FTRISB0 @ ((unsigned)&TRISB*8)+0;
volatile bit FTRISB1 @ ((unsigned)&TRISB*8)+1;
volatile bit FTRISB2 @ ((unsigned)&TRISB*8)+2;
volatile bit FTRISB3 @ ((unsigned)&TRISB*8)+3;
volatile bit FTRISB4 @ ((unsigned)&TRISB*8)+4;
volatile bit FTRISB5 @ ((unsigned)&TRISB*8)+5;
volatile bit FTRISB6 @ ((unsigned)&TRISB*8)+6;
volatile bit FTRISB7 @ ((unsigned)&TRISB*8)+7;



volatile unsigned char INTEN1 @ 0x08D;


volatile bit FCOMINTEN @ ((unsigned)&INTEN1*8)+1;


volatile bit COMINTEN @ ((unsigned)&INTEN1*8)+1;



volatile unsigned char CHIPCON @ 0x08E;
volatile unsigned char PCON @ 0x08E;

volatile bit FLVDTE @ ((unsigned)&PCON*8)+5;
volatile bit FLVREN @ ((unsigned)&PCON*8)+5;
volatile bit FEIS @ ((unsigned)&PCON*8)+6;
volatile bit FWDTE @ ((unsigned)&PCON*8)+7;

volatile bit LVDTE @ ((unsigned)&PCON*8)+5;
volatile bit LVREN @ ((unsigned)&PCON*8)+5;
volatile bit EIS @ ((unsigned)&PCON*8)+6;
volatile bit WDTE @ ((unsigned)&PCON*8)+7;



volatile unsigned char WUCON @ 0x08F;

volatile bit FWUB0 @ ((unsigned)&WUCON*8)+0;
volatile bit FWUB1 @ ((unsigned)&WUCON*8)+1;
volatile bit FWUB2 @ ((unsigned)&WUCON*8)+2;
volatile bit FWUB3 @ ((unsigned)&WUCON*8)+3;
volatile bit FWUB4 @ ((unsigned)&WUCON*8)+4;
volatile bit FWUB5 @ ((unsigned)&WUCON*8)+5;
volatile bit FWUB6 @ ((unsigned)&WUCON*8)+6;
volatile bit FWUB7 @ ((unsigned)&WUCON*8)+7;

volatile bit WUB0 @ ((unsigned)&WUCON*8)+0;
volatile bit WUB1 @ ((unsigned)&WUCON*8)+1;
volatile bit WUB2 @ ((unsigned)&WUCON*8)+2;
volatile bit WUB3 @ ((unsigned)&WUCON*8)+3;
volatile bit WUB4 @ ((unsigned)&WUCON*8)+4;
volatile bit WUB5 @ ((unsigned)&WUCON*8)+5;
volatile bit WUB6 @ ((unsigned)&WUCON*8)+6;
volatile bit WUB7 @ ((unsigned)&WUCON*8)+7;




volatile unsigned char PAIC0 @ 0x090;



volatile unsigned char PBIC0 @ 0x091;



volatile unsigned char PAHCON @ 0x092;

volatile bit PHA0 @ ((unsigned)&PAHCON*8)+0;
volatile bit PHA1 @ ((unsigned)&PAHCON*8)+1;
volatile bit PHA2 @ ((unsigned)&PAHCON*8)+2;
volatile bit PHA3 @ ((unsigned)&PAHCON*8)+3;
volatile bit PHA4 @ ((unsigned)&PAHCON*8)+4;
volatile bit PHA5 @ ((unsigned)&PAHCON*8)+5;

volatile bit FPHA0 @ ((unsigned)&PAHCON*8)+0;
volatile bit FPHA1 @ ((unsigned)&PAHCON*8)+1;
volatile bit FPHA2 @ ((unsigned)&PAHCON*8)+2;
volatile bit FPHA3 @ ((unsigned)&PAHCON*8)+3;
volatile bit FPHA4 @ ((unsigned)&PAHCON*8)+4;
volatile bit FPHA5 @ ((unsigned)&PAHCON*8)+5;


volatile unsigned char PADCON @ 0x093;
volatile unsigned char PDCON2 @ 0x093;

volatile bit FPDB4 @ ((unsigned)&PDCON2*8)+0;
volatile bit FPDB5 @ ((unsigned)&PDCON2*8)+1;
volatile bit FPDB6 @ ((unsigned)&PDCON2*8)+2;
volatile bit FPDB7 @ ((unsigned)&PDCON2*8)+3;
volatile bit FPDA4 @ ((unsigned)&PDCON2*8)+4;
volatile bit FPDA5 @ ((unsigned)&PDCON2*8)+5;

volatile bit PDB4 @ ((unsigned)&PDCON2*8)+0;
volatile bit PDB5 @ ((unsigned)&PDCON2*8)+1;
volatile bit PDB6 @ ((unsigned)&PDCON2*8)+2;
volatile bit PDB7 @ ((unsigned)&PDCON2*8)+3;
volatile bit PDA4 @ ((unsigned)&PDCON2*8)+4;
volatile bit PDA5 @ ((unsigned)&PDCON2*8)+5;


volatile unsigned char OSCM @ 0x094;

volatile bit FCLKMD @ ((unsigned)&OSCM*8)+0;
volatile bit FSTPHX @ ((unsigned)&OSCM*8)+1;

volatile bit FSLCON @ ((unsigned)&OSCM*8)+3;
volatile bit FSLT0CON @ ((unsigned)&OSCM*8)+4;
volatile bit FGREENEN @ ((unsigned)&OSCM*8)+5;
volatile bit FWAKEMODE @ ((unsigned)&OSCM*8)+6;

volatile bit CLKMD @ ((unsigned)&OSCM*8)+0;
volatile bit STPHX @ ((unsigned)&OSCM*8)+1;

volatile bit SLCON @ ((unsigned)&OSCM*8)+3;
volatile bit SLT0CON @ ((unsigned)&OSCM*8)+4;
volatile bit GREENEN @ ((unsigned)&OSCM*8)+5;
volatile bit WAKEMODE @ ((unsigned)&OSCM*8)+6;

# 505
volatile unsigned char EEADR @ 0x10D;
volatile unsigned char EEADRL @ 0x10D;



volatile unsigned char EEDATL @ 0x10E;

# 518
volatile unsigned char EECON @ 0x110;
volatile unsigned char EECON1 @ 0x110;

volatile bit FREADEE @ ((unsigned)&EECON*8)+0;
volatile bit FPROGEE @ ((unsigned)&EECON*8)+1;
volatile bit FERASEEE @ ((unsigned)&EECON*8)+2;
volatile bit FERSALLEE @ ((unsigned)&EECON*8)+3;
volatile bit FERSX16 @ ((unsigned)&EECON*8)+4;
volatile bit FTIMEE0 @ ((unsigned)&EECON*8)+5;



volatile bit READEE @ ((unsigned)&EECON*8)+0;
volatile bit PROGEE @ ((unsigned)&EECON*8)+1;
volatile bit ERASEEE @ ((unsigned)&EECON*8)+2;
volatile bit ERSALLEE @ ((unsigned)&EECON*8)+3;
volatile bit ERSX16 @ ((unsigned)&EECON*8)+4;
volatile bit TIMEE0 @ ((unsigned)&EECON*8)+5;

# 542
volatile unsigned char PWM0EN @ 0x111;

volatile bit FLOADEN @ ((unsigned)&PWM0EN*8)+0;
volatile bit FPWM0XEN @ ((unsigned)&PWM0EN*8)+1;
volatile bit FPWM01XEN @ ((unsigned)&PWM0EN*8)+2;
volatile bit FPWM0M @ ((unsigned)&PWM0EN*8)+3;
volatile bit FPWM1XEN @ ((unsigned)&PWM0EN*8)+4;
volatile bit FTP0SEL8 @ ((unsigned)&PWM0EN*8)+5;
volatile bit FTP0EN @ ((unsigned)&PWM0EN*8)+7;

volatile bit LOADEN @ ((unsigned)&PWM0EN*8)+0;
volatile bit PWM0XEN @ ((unsigned)&PWM0EN*8)+1;
volatile bit PWM01XEN @ ((unsigned)&PWM0EN*8)+2;
volatile bit PWM0M @ ((unsigned)&PWM0EN*8)+3;
volatile bit PWM1XEN @ ((unsigned)&PWM0EN*8)+4;
volatile bit TP0SEL8 @ ((unsigned)&PWM0EN*8)+5;
volatile bit TP0EN @ ((unsigned)&PWM0EN*8)+7;


volatile unsigned char PWM0C @ 0x112;

volatile bit CK0_0 @ ((unsigned)&PWM0C*8)+0;
volatile bit CK0_1 @ ((unsigned)&PWM0C*8)+1;
volatile bit PWMVS0 @ ((unsigned)&PWM0C*8)+2;
volatile bit PWMVS1 @ ((unsigned)&PWM0C*8)+3;
volatile bit PWMVS2 @ ((unsigned)&PWM0C*8)+4;
volatile bit CK0_2 @ ((unsigned)&PWM0C*8)+6;
volatile bit CK0_3 @ ((unsigned)&PWM0C*8)+7;

volatile bit FCK0_0 @ ((unsigned)&PWM0C*8)+0;
volatile bit FCK0_1 @ ((unsigned)&PWM0C*8)+1;
volatile bit FPWMVS0 @ ((unsigned)&PWM0C*8)+2;
volatile bit FPWMVS1 @ ((unsigned)&PWM0C*8)+3;
volatile bit FPWMVS2 @ ((unsigned)&PWM0C*8)+4;
volatile bit FCK0_2 @ ((unsigned)&PWM0C*8)+6;
volatile bit FCK0_3 @ ((unsigned)&PWM0C*8)+7;


volatile unsigned char PWM0TL @ 0x113;



volatile unsigned char PWM0TH @ 0x114;




volatile unsigned char PWM0PL @ 0x115;



volatile unsigned char PWM0PH @ 0x116;



volatile unsigned char PWM0DL @ 0x117;




volatile unsigned char PWM0DH @ 0x118;



volatile unsigned char PWM0DTL @ 0x119;



volatile unsigned char PWM0DTH @ 0x11A;



volatile unsigned char PWMPSCON @ 0x11B;

volatile bit PWM0S0 @ ((unsigned)&PWMPSCON*8)+0;
volatile bit PWM0S1 @ ((unsigned)&PWMPSCON*8)+1;
volatile bit PWM01S0 @ ((unsigned)&PWMPSCON*8)+2;
volatile bit PWM01S1 @ ((unsigned)&PWMPSCON*8)+3;
volatile bit PWM1S0 @ ((unsigned)&PWMPSCON*8)+4;
volatile bit PWM1S1 @ ((unsigned)&PWMPSCON*8)+5;

volatile bit FPWM0S0 @ ((unsigned)&PWMPSCON*8)+0;
volatile bit FPWM0S1 @ ((unsigned)&PWMPSCON*8)+1;
volatile bit FPWM01S0 @ ((unsigned)&PWMPSCON*8)+2;
volatile bit FPWM01S1 @ ((unsigned)&PWMPSCON*8)+3;
volatile bit FPWM1S0 @ ((unsigned)&PWMPSCON*8)+4;
volatile bit FPWM1S1 @ ((unsigned)&PWMPSCON*8)+5;


volatile unsigned char PWM1DL @ 0x011C;



volatile unsigned char PWM1DH @ 0x11D;

# 691
volatile unsigned char CMPCON @ 0x19E;

volatile bit FCOPOL @ ((unsigned)&CMPCON*8)+1;
volatile bit FCVEN @ ((unsigned)&CMPCON*8)+2;
volatile bit FCPEN @ ((unsigned)&CMPCON*8)+3;
volatile bit FCODEB @ ((unsigned)&CMPCON*8)+4;
volatile bit FFTCKS @ ((unsigned)&CMPCON*8)+5;
volatile bit FCMPIF @ ((unsigned)&CMPCON*8)+6;
volatile bit FCMPEN @ ((unsigned)&CMPCON*8)+7;

volatile bit COPOL @ ((unsigned)&CMPCON*8)+1;
volatile bit CVEN @ ((unsigned)&CMPCON*8)+2;
volatile bit CPEN @ ((unsigned)&CMPCON*8)+3;
volatile bit CODEB @ ((unsigned)&CMPCON*8)+4;
volatile bit FTCKS @ ((unsigned)&CMPCON*8)+5;
volatile bit CMPIF @ ((unsigned)&CMPCON*8)+6;
volatile bit CMPEN @ ((unsigned)&CMPCON*8)+7;


volatile unsigned char CMPM @ 0x19F;

volatile bit FVRS0 @ ((unsigned)&CMPM*8)+0;
volatile bit FVRS1 @ ((unsigned)&CMPM*8)+1;
volatile bit FVRS2 @ ((unsigned)&CMPM*8)+2;
volatile bit FVRS3 @ ((unsigned)&CMPM*8)+3;
volatile bit FXRVSEL @ ((unsigned)&CMPM*8)+4;
volatile bit FCPINS0 @ ((unsigned)&CMPM*8)+5;
volatile bit FCPINS1 @ ((unsigned)&CMPM*8)+6;
volatile bit FXRVSEL1 @ ((unsigned)&CMPM*8)+7;

volatile bit VRS0 @ ((unsigned)&CMPM*8)+0;
volatile bit VRS1 @ ((unsigned)&CMPM*8)+1;
volatile bit VRS2 @ ((unsigned)&CMPM*8)+2;
volatile bit VRS3 @ ((unsigned)&CMPM*8)+3;
volatile bit XRVSEL @ ((unsigned)&CMPM*8)+4;
volatile bit CPINS0 @ ((unsigned)&CMPM*8)+5;
volatile bit CPINS1 @ ((unsigned)&CMPM*8)+6;
volatile bit XRVSEL1 @ ((unsigned)&CMPM*8)+7;

# 10 "D:\Workspace\华芯技术支持资料包\HS16F1211开发资料\HS16F1211_cCode\HS16F1211_TMR0\main.h"
void GPIO_Init(void);

void TMR0_Init(unsigned char clkSelect,unsigned char frq,unsigned char tmr0_valInit) ;

void CLR_BANK0_RAM(void);
void CLR_BANK1_RAM(void);

void DelayUs(unsigned char delayUs);

# 19 "D:\Workspace\华芯技术支持资料包\HS16F1211开发资料\HS16F1211_cCode\HS16F1211_TMR0\main.c"
unsigned char u8Temp;
unsigned char TMR0_Mode;
bit F_OPTION_Updata;

void interrupt myIsr(void)
{
if(FT0IF)
{
FT0IF = 0;
TMR0 = 256-200;
PORTB = PORTB^0xff;
u8Temp++;
if(u8Temp>=3)
{
u8Temp = 0;
F_OPTION_Updata = 1;
}
}
}

# 58
void TMR0_Init(unsigned char clkSelect,unsigned char frq,unsigned char tmr0_valInit)
{
OPTION_REG= 0b00000000;

# 68
if(clkSelect) OPTION_REG |= 0x08;


OPTION_REG |= frq;

TMR0 = 256 - tmr0_valInit;
FT0IF = 0;
FT0IE = 1;
FGIE = 1;
}


void main(void)
{
GPIO_Init();
CLR_BANK0_RAM();
CLR_BANK1_RAM();


TMR0_Init(0,0,200);

while(1)
{

PORTA = PORTA^0xff;


if(F_OPTION_Updata)
{
F_OPTION_Updata = 0;
TMR0_Mode++;
switch(TMR0_Mode)
{
default: TMR0_Mode = 0;
case 0: OPTION_REG &= ~0x07; OPTION_REG |= 0; break;
case 1: OPTION_REG &= ~0x07; OPTION_REG |= 1; break;
case 2: OPTION_REG &= ~0x07; OPTION_REG |= 2; break;
case 3: OPTION_REG &= ~0x07; OPTION_REG |= 3; break;

case 4: OPTION_REG &= ~0x07; OPTION_REG |= 4; break;
case 5: OPTION_REG &= ~0x07; OPTION_REG |= 5; break;
case 6: OPTION_REG &= ~0x07; OPTION_REG |= 6; break;
case 7: OPTION_REG &= ~0x07; OPTION_REG |= 7; break;
}
}

}
}



void GPIO_Init(void)
{
OPTION_REG= 0b000000000;

# 129
PCON = 0b00100000;

# 135
PORTA = 0b00000000;
TRISA = 0b00000000;
PAHCON= 0b11111111;
PADCON= 0b11111111;
PAIC0 = 0b00000000;

PDCON = 0b11111111;
PDCON2= 0b11111111;

PORTB = 0b00000000;
TRISB = 0b00000000;
PBIC0 = 0b00000000;
WUCON = 0b00000000;
ODCON = 0b00000000;
PHCON = 0b11111111;

}

# 158
void CLR_BANK0_RAM(void)
{

# 160
#asm
 MOVLW 0X5F
 MOVWF 020H
 MOVLW 0X7F
 MOVWF _FSR

 BANK0_RAM_CLR_LOOP:
 CLRF _INDF
 DECF _FSR,F
 DECFSZ 020H,F
 GOTO BANK0_RAM_CLR_LOOP
#endasm 	   
}

# 179
void CLR_BANK1_RAM(void)
{

# 181
#asm
 MOVLW (0x80 | 03FH)
 MOVWF _FSR
 MOVLW 020H
 MOVWF 020H

 BANK1_RAM_CLR_LOOP:
 CLRF _INDF
 DECF _FSR,F
 DECFSZ 020H,F
 GOTO BANK1_RAM_CLR_LOOP
 RETURN
#endasm 	   
}



void DelayUs(unsigned char delayUs)
{
while(delayUs--);
}
