/**
******************************************************************************************************************************************************************************************
*@file                       cpu_uart.h
*@author         
*@data                       
*@version                    v1.0
*@par Copyright(c):
*
*@par History:
*     version:author,date,desc
*     v1.0   :create this file
*
*******************************************************************************************************************************************************************************************
*/
#ifndef CPU_UART_H
#define CPU_UART_H

#ifdef __cplusplus
 extern "C" {
#endif 
	 
#include "cpu.h"
	 
  
typedef struct
{
  uint32_t uart_baudrate;          

  uint32_t uart_word_len;          

  uint32_t uart_stop_bits;           

  uint32_t uart_parity;   
	
} uart_init_struct;


#define IS_UART_ALL_PERIPH(PERIPH) (((PERIPH) == UART0) || \
                                     ((PERIPH) == UART1)) 


  
#define UART_WordLength_5b                  (0x00000000)
#define UART_WordLength_6b                  (0x00000001)
#define UART_WordLength_7b                  (0x00000002)
#define UART_WordLength_8b                  (0x00000003)
                                    
#define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WordLength_5b) || \
                                      ((LENGTH) == UART_WordLength_6b) || \
									  ((LENGTH) == UART_WordLength_7b) || \
									  ((LENGTH) == UART_WordLength_8b))

  
#define UART_StopBits_1                     	(0x00000000)
#define UART_StopBits_1_5                  		(0x00000004)
#define UART_StopBits_2                     	(0x00000004)
#define IS_UART_STOPBITS(STOPBITS, DATALENGTH) (((STOPBITS) == UART_StopBits_1) || \
                                     ((STOPBITS) == UART_StopBits_1_5 && DATALENGTH == UART_WordLength_5b) || \
                                     ((STOPBITS) == UART_StopBits_2 && DATALENGTH != UART_WordLength_5b))

  
#define UART_Parity_No                      		(0x00000000)
#define UART_Parity_Even                    		(0x00000018)
#define UART_Parity_Odd                     		(0x00000008) 
#define IS_UART_PARITY(PARITY) (((PARITY) == UART_Parity_No) || \
                                 ((PARITY) == UART_Parity_Even) || \
                                 ((PARITY) == UART_Parity_Odd))


  
#define UART_FLAG_TEMT											((uint32_t)0x0040)	
#define UART_FLAG_THRE											((uint32_t)0x0020)
#define UART_FLAG_DR												((uint32_t)0x0001)
#define IS_UART_FLAG(FLAG) (((FLAG) == UART_FLAG_TEMT) || ((FLAG) == UART_FLAG_THRE) || \
                             ((FLAG) == UART_FLAG_DR) )
											
  
#define UART_IT_ETBEI_TX											((uint32_t)0x0002)	
#define UART_IT_ERBFI_RX											((uint32_t)0x0001)
#define UART_IT_PTIME													((uint32_t)0x0080)

#define UART_IID_MODEM_STATUS									(0x00)
#define UART_IID_NO_INTERRUPT									(0x01)
#define UART_IID_THR_EMPTY										(0x02)
#define UART_IID_RECVD_DATA_AVAILABLE					(0x04)
#define	UART_IID_RECEIVER_LINE_STATUS					(0x06)
#define	UART_IID_BUSY_DETECT									(0x07)
#define UART_IID_CHAR_TIMEOUT									(0x0C)

//Repair****

typedef struct
{
	functional_state_t FIFO_Enable;
	uint32_t FIFO_DMA_Mode;
	uint32_t FIFO_RX_Trigger;
	uint32_t FIFO_TX_Trigger;
	uint32_t FIFO_TX_TriggerIntEnable;
}uart_fifo_struct;

#define XTAL_speed_clock			__XTAL
#define High_speed_clock			__HSI
#define UART_IT_RX_RECVD						((uint32_t)0x0001)
#define UART_IT_TX_EMPTY						((uint32_t)0x0002)
#define UART_IT_LINE_STATUS						((uint32_t)0x0004)

/** @defgroup UART_Interrupt_identity
  * @{
  */
#define UART_IT_ID_MODEM_STATUS			((uint32_t)0x0000)
#define UART_IT_ID_NO_INTERRUPT			((uint32_t)0x0001)
#define UART_IT_ID_TX_EMPTY				((uint32_t)0x0002)
#define UART_IT_ID_RX_RECVD				((uint32_t)0x0004)
#define	UART_IT_ID_LINE_STATUS			((uint32_t)0x0006)
#define	UART_IT_ID_BUSY_DETECT			((uint32_t)0x0007)
#define UART_IT_ID_CHAR_TIMEOUT			((uint32_t)0x000C)

/** @defgroup UART_Status_Flag_define
  * @{
  */
#define UART_STATUS_BUSY							((uint32_t)0x0001)
#define UART_STATUS_TX_FIFO_NOT_FULL				((uint32_t)0x0002)
#define UART_STATUS_TX_FIFO_EMPTY					((uint32_t)0x0004)
#define UART_STATUS_RX_FIFO_NOT_EMPTY				((uint32_t)0x0008)
#define UART_STATUS_RX_FIFO_FULL					((uint32_t)0x0010)

/** @defgroup UART_Line_Status_Flag_define
  * @{
  */
#define UART_LINE_STATUS_RX_RECVD								((uint32_t)0x0001)
#define UART_LINE_STATUS_RX_OVERRUN_ERROR						((uint32_t)0x0002)
#define UART_LINE_STATUS_RX_PARITY_ERROR						((uint32_t)0x0004)
#define UART_LINE_STATUS_RX_FRAMING_ERROR						((uint32_t)0x0008)
#define UART_LINE_STATUS_RX_BREAK_INTERRUPT					    ((uint32_t)0x0010)
#define UART_LINE_STATUS_TX_HOLDING_REGISTER_EMPTY	            ((uint32_t)0x0020)
#define UART_LINE_STATUS_TX_EMPTY								((uint32_t)0x0040)
#define UART_LINE_STATUS_RX_FIFO_ERROR							((uint32_t)0x0080)

/** @defgroup UART_FIFO_Control_define
  * @{
  */

#define UART_FIFO_DEPTH											(16)

#define UART_FIFO_RX											((uint32_t)0x0000)
#define UART_FIFO_TX											((uint32_t)0x0001)

#define UART_FIFO_DMA_Mode_0								((uint32_t)0x0000)
#define UART_FIFO_DMA_Mode_1								((uint32_t)0x0001)

#define UART_FIFO_RX_Trigger_1_Char					((uint32_t)0x0000)
#define UART_FIFO_RX_Trigger_1_4_Full				((uint32_t)0x0001)
#define UART_FIFO_RX_Trigger_1_2_Full				((uint32_t)0x0002)
#define UART_FIFO_RX_Trigger_2_CharLessFull     	((uint32_t)0x0003)

#define UART_FIFO_TX_Trigger_Empty					((uint32_t)0x0000)
#define UART_FIFO_TX_Trigger_2_Chars				((uint32_t)0x0001)
#define UART_FIFO_TX_Trigger_1_4_Full				((uint32_t)0x0002)
#define UART_FIFO_TX_Trigger_1_2_Full				((uint32_t)0x0003)

/*******************  Bit definition for UART_IER register  *******************/
#define UART_IER_ERBFI							((uint32_t)0x0001)
#define UART_IER_ETBEI							((uint32_t)0x0002)
#define UART_IER_ELSI							((uint32_t)0x0004)
#define UART_IER_EDSSI							((uint32_t)0x0008)
#define UART_IER_PTIME							((uint32_t)0x0080)

/*******************  Bit definition for UART_SDMAM register  *******************/
#define UART_SDMAM_SDMAM							((uint32_t)0x0001)

/*******************  Bit definition for UART_SFE register  *******************/
#define UART_SFE_SFE								((uint32_t)0x0001)

//Repair****


void uart_init(uart_typedef_t* uartx, uart_init_struct* p_uart_init);
void uart_auto_flow_ctrl_cmd(uart_typedef_t* uartx, functional_state_t new_state);


void uart_it_config(uart_typedef_t* uartx, uint32_t uart_it, functional_state_t new_state);

void uart_send_data(uart_typedef_t* uartx, uint8_t data);
boolean uart_is_tx_empty(uart_typedef_t* uartx);
void uart_fifo_cmd(uart_typedef_t* uartx,functional_state_t new_state);
boolean uart_is_received_data_ready(uart_typedef_t * uartx);
uint8_t uart_receive_data(uart_typedef_t* uartx);
void uart_set_rts(uart_typedef_t* uartx);
void uart_reset_rts(uart_typedef_t* uartx);
void uart_fifo_set_trigger_level(uart_typedef_t* uartx,uint32_t tx_trigger,uint32_t rx_trigger);

//Repair****
//interrupt
uint32_t uart_get_ti_dentity(uart_typedef_t* uartx);
//even
uint32_t uart_get_line_status(uart_typedef_t* uartx);
//FIFO
void uart_struct_init(uart_init_struct* uart_init_struct);
void uart_fifo_init(uart_typedef_t* uartx, uart_fifo_struct* uart_fifo_init_struct);
void uart_fifo_struct_init(uart_fifo_struct* uart_fifo_init_struct);
boolean uart_is_rx_fifo_full(uart_typedef_t* uartx);
boolean uart_is_rx_fifo_no_empty(uart_typedef_t* uartx);
boolean uart_is_tx_fifo_empty(uart_typedef_t* uartx);
boolean uart_is_tx_fifo_not_full(uart_typedef_t* uartx);
boolean uart_is_uart_busy(uart_typedef_t* uartx);
//Repair****

#ifdef __cplusplus
}
#endif

#endif // CPU_SCU_UART_H
