/**
******************************************************************************************************************************************************************************************
*@file                       cpu_qspi.h
*@author         
*@data                       
*@version                    v1.0
*@par Copyright(c):
*
*@par History:
*     version:author,date,desc
*     v1.0   :create this file
*
*******************************************************************************************************************************************************************************************
*/
#ifndef __CPU_QSPI__
#define __CPU_QSPI__

#include "cpu.h"

typedef struct
{
	uint32_t Instruction;       
	uint32_t bus_mode;
	uint32_t cmd_format;
	uint32_t address;
	uint32_t wrData;
	uint32_t rdData;
}qspi_command_type_def;

typedef enum
{
	QSPI_BUSMODE_111 = 0x00,	//CMD-ADDR-DATA = 1-1-1
	QSPI_BUSMODE_114 = 0x01,	//CMD-ADDR-DATA = 1-1-4
	QSPI_BUSMODE_144 = 0x02,	//CMD-ADDR-DATA = 1-4-4
	QSPI_BUSMODE_444 = 0x03,	//CMD-ADDR-DATA = 4-4-4
}qspi_bus_mode_type_def;

typedef enum
{
	QSPI_CMDFORMAT_CMD8							= 0x00,
	QSPI_CMDFORMAT_CMD8_RREG8					= 0x01,
	QSPI_CMDFORMAT_CMD8_RREG16					= 0x02,
	QSPI_CMDFORMAT_CMD8_RREG24					= 0x03,
	QSPI_CMDFORMAT_CMD8_DMY24_WREG8				= 0x04,
	QSPI_CMDFORMAT_CMD8_ADDR24_RREG8			= 0x05,
	QSPI_CMDFORMAT_CMD8_ADDR24_RREG16			= 0x06,
	QSPI_CMDFORMAT_CMD8_WREG8					= 0x07,
	QSPI_CMDFORMAT_CMD8_WREG16					= 0x08,
	QSPI_CMDFORMAT_CMD8_ADDR24					= 0x09,
	QSPI_CMDFORMAT_CMD8_ADDR24_RDAT				= 0x0A,
	QSPI_CMDFORMAT_CMD8_ADDR24_DMY_RDAT			= 0x0B,
	QSPI_CMDFORMAT_CMD8_ADDR24_M8_DMY_RDAT		= 0x0C,
	QSPI_CMDFORMAT_CMD8_ADDR24_PDAT				= 0x0D
}qspi_cmd_format_type_def;

#endif

